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M95256-DF 数据表(PDF) 5 Page - STMicroelectronics |
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M95256-DF 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 51 page ![]() 3 Signal description During all operations, VCC must be held stable and within the specified valid range: VCC(min) to VCC(max). All of the input and output signals must be held high or low (according to voltages of VIH, VOH, VIL or VOL, as specified in Section 9 DC and AC parameters). These signals are described next. 3.1 Serial data output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial clock (C). 3.2 Serial data input (D) This input signal is used to transfer data serially into the device. It receives instructions, addresses, and the data to be written. Values are latched on the rising edge of Serial clock (C). 3.3 Serial clock (C) This input signal provides the timing of the serial interface. Instructions, addresses, or data present at Serial data input (D) are latched on the rising edge of Serial clock (C). Data on Serial data output (Q) change from the falling edge of Serial clock (C). 3.4 Chip select (S) When this input signal is high, the device is deselected and Serial data output (Q) is at high impedance. The device is in the Standby power mode, unless an internal Write cycle is in progress. Driving Chip select (S) low selects the device, placing it in the Active power mode. After power-up, a falling edge on Chip select (S) is required prior to the start of any instruction. 3.5 Hold (HOLD) The Hold (HOLD) signal is used to pause any serial communications with the device without deselecting the device. During the Hold condition, the Serial data output (Q) is high impedance, and Serial data input (D) and Serial clock (C) are Don’t care. To start the Hold condition, the device must be selected, with Chip select (S) driven low. 3.6 Write protect (W) The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status register). This pin must be driven either high or low, and must be stable during all Write instructions. 3.7 VCC supply voltage VCC is the supply voltage. 3.8 VSS ground VSS is the reference for all signals, including the VCC supply voltage. M95256-W M95256-R M95256-DF Signal description DS4712 - Rev 22 page 5/51 |
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