M95256-DF datasheet(8/51 Pages) STMICROELECTRONICS

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Operating features

5.1

Supply voltage (VCC)

5.1.1

Operating supply voltage (VCC)

Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified

[VCC(min), VCC(max)] range must be applied (see Operating conditions in Section 9 DC and AC parameters).

This voltage must remain stable and valid until the end of the transmission of the instruction and, for a Write

instruction, until the completion of the internal write cycle (tW). In order to secure a stable DC supply voltage, it is

recommended to decouple the VCC line with a suitable capacitor (usually in the range between 10 and 100 nF)

close to the VCC / VSS device pins.

5.1.2

Device reset

In order to prevent erroneous instruction decoding and inadvertent Write operations during power

‑up, a

power

‑on‑reset (POR) circuit is included. At power-up, the device does not respond to any instruction until

VCC reaches the POR threshold voltage. This threshold is lower than the minimum VCC operating voltage (see

Operating conditions in Section 9 DC and AC parameters).

At power-up, when VCC passes over the POR threshold, the device is reset and is in the following state:

•

in Standby power mode,

•

deselected,

•

Status register values:

–

the Write enable latch (WEL) bit is reset to 0

–

the Write in progress (WIP) bit is reset to 0

–

the SRWD, BP1 and BP0 bits remain unchanged (non-volatile bits).

It is important to note that the device must not be accessed until VCC reaches a valid and stable level within

the specified [VCC(min), VCC(max)] range, as defined under Operating conditions in Section 9 DC and AC

parameters.

5.1.3

Power-up conditions

When the power supply is turned on, VCC rises continuously from VSS to VCC. During this time, the Chip select (S)

line is not allowed to float but should follow the VCC voltage. It is therefore recommended to connect the S line to

VCC via a suitable pull-up resistor (see Figure 5. Bus master and memory devices on the SPI bus).

In addition, the Chip select (S) input offers a built-in safety feature, as the S input is edge-sensitive as well as

level-sensitive: after power-up, the device does not become selected until a falling edge has first been detected

on Chip select (S). This ensures that Chip select (S) must have been high, prior to going low to start the first

operation.

The VCC voltage has to rise continuously from 0 V up to the minimum VCC operating voltage defined in

Section 9 DC and AC parameters.

5.1.4

Power-down

During power-down (continuous decrease of the VCC supply voltage below the minimum VCC operating voltage

defined in Section 9 DC and AC parameters), the device must be:

•

deselected (Chip select S must be allowed to follow the voltage applied on VCC)

•

in Standby power mode (there must not be any internal write cycle in progress)

M95256-W M95256-R M95256-DF

Operating features

DS4712 - Rev 22

page 8/51

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