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M95256-DF 数据表(PDF) 12 Page - STMicroelectronics

部件名 M95256-DF
功能描述  256-Kbit serial SPI bus EEPROM with high-speed clock
PDF  51 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95256-DF 数据表(HTML) 12 Page - STMicroelectronics

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6.1
Write enable (WREN)
The Write enable latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this
is to send a Write enable instruction to the device.
As shown in Figure 8, to send this instruction to the device, Chip select (S) is driven low, and the bits of the
instruction byte are shifted in, on Serial data input (D). The device then enters a wait state. It waits for the device
to be deselected by Chip select (S) being driven high.
Figure 8. Write enable (WREN) sequence
MS41478V1
C
D
Q
2
1
3
4
5
6
7
High impedance
0
Instruction
S
M95256-W M95256-R M95256-DF
Write enable (WREN)
DS4712 - Rev 22
page 12/51



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