11

AT49LL080

3273C–FLASH–5/03

Register-based

Locking and General-

purpose Input

Registers

A series of registers are available in the LPC to provide software read and write locking

and GPI feedback. These registers are accessible through standard addressable mem-

ory space.

REGISTERS: The AT49LL080 has two types of registers: sector-locking registers and

general-purpose input registers. The two types of registers appear at their respective

address locations in the 4 GB system memory map.

SECTOR-LOCKING REGISTERS: The AT49LL080 has 16 (LR0 - LR15) sector-locking

registers. Each sector-locking register controls the lock protection for a sector of mem-

ory as shown in Table 7. The sector-locking registers are accessible through the register

memory address shown in the third column of Table 7. The sector-locking registers are

read/write as shown in the last column of Table 7. Each sector has three dedicated lock-

ing bits as shown in Table 8 and Table 9.

Device Memory Map with LPC Hardware Lock Architecture

Sector

Size (Bytes)

Address Range

Hardware Write-protect Pin

SA15

64K

F0000 - FFFFF

TBL

SA14

64K

E0000 - EFFFF

WP

SA13

64K

D0000 - DFFFF

WP

SA12

64K

C0000 - CFFFF

WP

SA11

64K

B0000 - BFFFF

WP

SA10

64K

A0000 - AFFFF

WP

SA9

64K

90000 - 9FFFF

WP

SA8

64K

80000 - 8FFFF

WP

SA7

64K

70000 - 7FFFF

WP

SA6

64K

60000 - 6FFFF

WP

SA5

64K

50000 - 5FFFF

WP

SA4

64K

40000 - 4FFFF

WP

SA3

64K

30000 - 3FFFF

WP

SA2

64K

20000 - 2FFFF

WP

SA1

64K

10000 - 1FFFF

WP

SA0

64K

00000 - 0FFFF

WP