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STM32G0C1NET7 数据表(PDF) 106 Page - STMicroelectronics

部件名 STM32G0C1NET7
功能描述  Arm® Cortex®-M0 32-bit MCU, up to 512KB Flash, 144KB RAM,6x USART, timers, ADC, DAC, comm. I/Fs, AES, RNG, 1.7-3.6V
PDF  159 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32G0C1NET7 数据表(HTML) 106 Page - STMicroelectronics

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Electrical characteristics
STM32G0C1xC/xE
106/159
DS13564 Rev 4
ENOB
Effective
number of bits
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
10.1
10.2
-
bit
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
9.6
10.2
-
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
9.5
10.2
-
SINAD
Signal-to-noise
and distortion
ratio
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
62.5
63
-
dB
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
59.5
63
-
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
59
63
-
SNR
Signal-to-noise
ratio
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
63
64
-
dB
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
60
64
-
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
60
64
-
THD
Total harmonic
distortion
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
--74
-73
dB
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
--74
-70
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
--74
-70
1. Based on characterization results, not tested in production.
2. ADC DC accuracy values are measured after internal calibration.
3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion of signal on
another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins susceptible to receive
negative current.
4. I/O analog switch voltage booster enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled
when VDDA ≥ 2.4 V.
Table 63. ADC accuracy(1)(2)(3) (continued)
Symbol
Parameter
Conditions(4)
Min
Typ
Max
Unit



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