SAF784X datasheet(2/93 Pages) NXP

2 / 93 page

SAF784X_2

Product data sheet

Rev. 02 — 9 May 2008

2 of 93

NXP Semiconductors

SAF784x

One chip CD audio device with integrated MP3/WMA decoder

I Two additional analog audio inputs (AUX_L, AUX_R) to allow the ARM microprocessor

access to external audio signals (e.g. tuner); allows audio algorithms (e.g. bass boost)

to be performed on external audio signals

I Real-time clock operated from separate 32 kHz crystal; allows low-power Standby

mode with real-time clock still operational

I Watchdog timer

I I2S-bus, S/PDIF, subcode (V4) and subcode sync outputs

I 32 GPIOs

I Two standard UART channels

I Two external interrupt pins

I I2C-bus interface conﬁgurable for master or slave modes, supporting 100 kbit/s and

400 kbit/s standards

I Slave I2S-bus mode, in which the channel decoder can synchronize the CD playback

speed to an I2S-bus clock input

I Integrated digital HF/Mirror detector with measurement of minimum and maximum

peak values, amplitude and offset

I Integrated CD-text decoder

I Up to 6× decode speed, CLV or CAV modes

I LQFP144 package with 0.5 mm pin pitch

I Separate left and right channel digital silence detection available on KILL pins

I Digital silence detection available on loopback data from external source as well as

internal data

I ‘Filterless’ pseudo bit stream audio DAC with minimal external components

I Stereo line outputs for audio DAC

I Loopback mode allowing the use of integrated DAC with external I2S-bus/EIAJ sources

I Compatible with voltage mode mechanisms

I On-chip buffering and ﬁltering of the diode signals from the mechanism in order to

optimize the signals for the decoder and servo parts

I LF (servo) signals converted to digital representations by Sigma-Delta ADCs shared

between pairs of channels to minimize DC offset between channels

I HF part summed from signals D1 to D4 and converted to digital signals by HF 6-bit

ADC

I Selectable DC offset cancellation of quiescent mechanism voltages and dark currents,

digitally controlled; additional ﬁne DC-offset cancellation in digital domain

I Eye pattern monitor system to observe selectable points within the analog pre-amp

I Current and average jitter values available via registers

I On-chip laser power control, up to maximum currents of 120 mA

I Laser on-off control, including ‘soft’-start control - zero-to-nominal output power in

1ms

I Monitor control and feedback circuit to maintain nominal output power throughout laser

life

I Conﬁgured for Nsub (N-substrate) monitor diode

I JTAG interface for device access and ARM code development (compatible with ARM

multi-ICE)

I All digital input pins 5 V tolerant

I Low-latency static memory interface to access a maximum of two 2 MB memory

SAF784X 数据表(PDF) 2 Page - NXP Semiconductors

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