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ST7540 数据表(PDF) 6 Page - STMicroelectronics |
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ST7540 数据表(HTML) 6 Page - STMicroelectronics |
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6 / 44 page ![]() Pin settings ST7540 6/44 7 BU/THERM Digital/Output Band in use/Thermal Shutdown event detection output. In Rx mode: "1" Signal within the programmed band "0" No signal within the programmed band In Tx mode: "1" - Thermal Shutdown event occurred "0" - No Thermal Shutdown event occurred (signal not latched) 8 CLR/T Digital/Output Synchronous mains access clock or control register access clock 9 VDD Supply/Power Digital supply voltage or 3.3V voltage regulator output 10 MCLK Digital/Output Master clock output 11 RSTO Digital/Output Power ON or watchdog reset output 12 UART/SPI Digital/Input with internal pull-down Interface type: “0” - Serial peripheral interface “1” - UART interface 13 WD Digital/Input with internal pull-up Watchdog input. The internal watchdog counter is cleared on the falling edges. 14 PA_IN- Analog/Input Power line amplifier inverting input 15 PA_OUT Power/Output Power line amplifier output 16 VSS Supply Power analog ground 17 VCC Supply Power supply voltage 18 PA_IN+ Analog/Input Power line amplifier not inverting input 19 TX_OUT Analog/Output Small signal analog transmit output 20 SVSS Supply Analog signal ground 21 X1 Analog/Output Crystal oscillator output 22 X2 Analog/Input Crystal oscillator input - or external clock input 23 VSENSE (1) Analog/Input Output voltage sensing input for the voltage control loop 24 CL(2) Analog/Input Current limiting feedback. A resistor between CL and SVSS sets the PLI current limiting value. An integrated 80pF filtering input capacitance is present on this pin. 25 RX_IN Analog/Input Receiving analog input 26 VDC Power 5V voltage regulator output 27 TEST1 Digital/Input with internal pull-down Test input. Must be connected to GND. 28 TEST2 Analog/Input Test input. Must be connected SVSS 1. Cannot be left floating 2. Cannot be left floating Table 1. Pin description (continued) N° Name Type Description |
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