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ST7540 数据表(PDF) 13 Page - STMicroelectronics |
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ST7540 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 44 page ![]() ST7540 Electrical characteristics 13/44 5V Voltage regulator VDC Linear regulator output voltage 0 < Io < 50mA 7.5V < VCC < 13.5V -5% 5.05 +5% V 3.3V Voltage regulator VDD Linear regulator output voltage 0 < Io < 50mA 7.5V < VCC < 13.5V -5% 3.3 +5% V Other functions TRSTO Reset time See Figure 23; Xtal = 16MHz 50 ms TWD Watch-dog pulse width See Figure 23 125 ns TWM Watch-dog pulse period Minimum value. See Figure 23 250 ns Maximum value. See Figure 23 1490 ms TWO Watch-dog time out See Figure 23 1.5 s TOUT TX time out Control register bit 7 and bit 8 1 3 s TOFF Time Out OFF time Figure 22 125 ms TOFFD RxTx 0->1 vs. time out delay Figure 22 20 µs TCD Carrier detection time selectable by register Control register bit 9 and bit10 Figure 14 500 1 3 5 µs ms ms ms TDCD CD_PD Propagation delay Figure 14 300 500 µs MCLK Master clock output selectable by register Control register bit 15 and bit 16 See Table 12 fclock fclock/2 fclock/4 off MHz BAUD Baud rate Control register bit 3 and bit 4 See Table 12 600 1200 2400 4800 Baud Table 5. Electrical characteristics (continued) ( VDD = +5V, VCC =+9 V, VSS = SVSS = GND = 0V,-40°C ≤TA ≤85°C, TJ < 125°C, unless otherwise specified) Symbol Parameter Test condition Min. Typ. Max. Unit |
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