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ST7540 数据表(PDF) 18 Page - STMicroelectronics

部件名 ST7540
功能描述  FSK power line transceiver
PDF  44 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7540 数据表(HTML) 18 Page - STMicroelectronics

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Functional description
ST7540
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6.4
ST7540 Mains access
ST7540 can access the Mains in two different ways:
Synchronous access
Asynchronous access
The choice between the two types of access can be performed by means of Control
Register bit 14(see Table 12) and affects the ST7540 data flow in Transmission Mode as in
Reception Mode (for how to set the communication Mode, see Section 6.5).
In data transmission mode:
Synchronous Mains access: on clock signal provided by ST7540 (CLR/T line) rising
edge, data transmission line (TxD line) value is read and sent to the FSK Modulator.
ST7540 manages the Transmission timing according to the BaudRate Selected.
Asynchronous Mains access: data transmission line (TxD line) value enters directly to
the FSK Modulator. The Host Controller manages the Transmission timing (CLR/T line
should be neglected).
In data reception mode:
Synchronous Mains access: on clock signal recovered by a PLL from ST7540 (CLR/T
line) rising edge, value on FSK Demodulator is read and put to the data reception line
(RxD line). ST7540 recovers the bit timing timing according to the BaudRate Selected.
Asynchronous Mains access: Value on FSK Demodulator is sent directly to the data
reception line (RxD line). The Host Controller recovers the communication timing
(CLR/T line should be neglected).
76
600
--
132.5
600
--
1
75684
76335
1
132161
132813
1200
0.5
75684
76335
1200
0.5
132161
132813
1
75358
76660
1
131836
133138
2400
0.5
75358
76660
2400
0.5
131836
133138
1
74870
77148
1
131348
133626
4800
0.5
74870
77148
4800
0.5
131348
133626
1
73568
78451
1
130046
134928
Table 8. ST7540 synthesized frequencies



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