CS5920 datasheet(105/160 Pages) AMCC

105 / 160 page

S5920 – PCI Product

Revision 1.01 – November 28, 2005

AMCC Confidential and Proprietary

DS1596

105

Data Book

MAILBOX OVERVIEW

The S5920 has two 32-bit mailbox registers. These

mailboxes are useful for passing command and status

information between the Add-On and the PCI bus. The

PCI interface has one incoming mailbox (Add-On to

PCI) and one outgoing mailbox (PCI to Add-On). The

Add-On interface has one incoming mailbox (PCI to

Add-On) and one outgoing mailbox (Add-On to PCI).

The PCI incoming and Add-On outgoing mailboxes

are the same, internally. The Add-On incoming and

PCI outgoing mailboxes are also the same, internally.

The mailbox status may be monitored in two ways.

The PCI and Add-On interfaces each have a mailbox

status register to indicate the empty/full status of data

bytes within the mailboxes. The mailboxes may also

be configured to generate interrupts to the PCI and/or

Add-On interface. The outgoing and the incoming

mailbox on each interface can be configured to gener-

ate interrupts.

FUNCTIONAL DESCRIPTION

Figure 1 shows a block diagram of the PCI to Add-On

mailbox registers. Add-On incoming mailbox read

accesses pass through an output interlock register.

This prevents a PCI bus write to a PCI outgoing mail-

box from corrupting data being read by the Add-On.

Figure 2 shows a block diagram of the Add-On to PCI

mailbox registers. PCI incoming mailbox reads also

pass through an interlocking mechanism. This pre-

vents an Add-On write to an outgoing mailbox from

corrupting data being read by the PCI bus. The follow-

ing sections describe the mailbox flag functionality and

the mailbox interrupt capabilities.

Figure 55. Figure 1. PCI to Add-On Mailbox Register

MAILBOX

PCI CLK

OUTPUT

INTERLOCK

ADCLK

PCI CLK

ADD-ON BUS

RD#

SELECT#

ADR -MB

MAILBOX

FULL

LOAD ENABLE

PCI BUS

ADCLK

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