CS5920 datasheet(69/160 Pages) AMCC

69 / 160 page

S5920 – PCI Product

Revision 1.01 – November 28, 2005

AMCC Confidential and Proprietary

DS1596

Data Book

PCI MAILBOX EMPTY/FULL STATUS REG-

ISTER (MBEF)

This register provides empty/full visibility for each byte

within the mailboxes. The empty/full status for the PCI

Outgoing mailbox is displayed on bits 15 to 12 and the

empty/full status for the PCI Incoming mailbox is pre-

sented on bits 31 to 28. A value of 1 signifies that a

given mailbox has been written by one bus interface

but has not yet been read by the corresponding desti-

nation interface. The PCI bus incoming mailbox

transfers data from the Add-On bus to the PCI bus,

and the PCI outgoing mailbox transfers data from the

PCI bus to the Add-On bus. This register is also

referred to as the Add-On Mailbox Empty/Full Status

Figure 28. Mailbox Empty/Full Status Register (MBEF)

Mailbox Empty/Full Status

PCI Address Offset:

34h

Power-up value:

00000000h

PCI Attribute:

Read Only

Size:

32 bits

Table 40. Mailbox Empty/Full Status Register

Bit

Description

31:28

PCI Incoming Mailbox Status. This field indicates which byte of the incoming mailbox register has been written

by the Add-On interface but has not been read by the PCI bus. Each bit location corresponds to a specific byte

within the incoming mailbox. A value of one for each bit signifies that the specified mailbox byte is full, and a

value of 0 signifies empty. The mapping of these status bits to bytes within the mailbox is as follows:

Bit 31 = Incoming mailbox byte 3

Bit 30 = Incoming mailbox byte 2

Bit 29 = Incoming mailbox byte 1

Bit 28 = Incoming mailbox byte 0

15:12

PCI Outgoing Mailbox Status. This field indicates which byte of the outgoing mailbox register has been written

by the PCI bus interface but has not yet been read by the Add-On bus. Each bit location corresponds to a spe-

cific byte within the outgoing mailbox. A value of one for each bit signifies that the specified mailbox byte is full,

and a value of 0 signifies empty. The mapping of these status bits to bytes is as follows:

Bit 15 = Outgoing mailbox byte 3

Bit 14 = Outgoing mailbox byte 2

Bit 13 = Outgoing mailbox byte 1

Bit 12 = Outgoing mailbox byte 0

Reserved

PCI Outgoing

Mailbox Status (RO)

0000

PCI Incoming

Mailbox Status (RO)

Reserved

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