STR91XF datasheet(13/72 Pages) STMICROELECTRONICS

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STR91xF

Functional overview

13/72

See Table 1 for recommended interrupt source assignments to physical IRQ interrupt channels.

Interrupt source assignments are made by CPU firmware during initialization, thus establishing

interrupt priorities.

Table 1.

Recommended IRQ Channel assignments (set by CPU firmware)

VIC IRQ Channel

Logic Block

Interrupt Source

0 (high priority)

WatchDog

Timeout in WDT mode, Terminal Count in Counter Mode

CPU Firmware

Firmware generated interrupt

CPU Core

Debug Receive Command

CPU Core

Debug Transmit Command

TIM Timer 0

Logic OR of ICI0_0, ICI0_1, OCI0_0, OCI0_1, Timer overflow

TIM Timer 1

Logic OR of ICI1_0, ICI1_1, OCI1_0, OCI1_1, Timer overflow

TIM Timer 2

Logic OR of ICI2_0, ICI2_1, OCI2_0, OCI2_1, Timer overflow

TIM Timer 3

Logic OR of ICI3_0, ICI3_1, OCI3_0, OCI3_1, Timer overflow

USB

Logic OR of high priority USB interrupts

USB

Logic OR of low priority USB interrupts

CCU

Logic OR of all interrupts from Clock Control Unit

Ethernet MAC

Logic OR of Ethernet MAC interrupts via its own dedicated

DMA channel.

DMA

Logic OR of interrupts from each of the 8 individual DMA

channels

CAN

Logic OR of all CAN interface interrupt sources

IMC

Logic OR of 8 Induction Motor Control Unit interrupts

ADC

End of AtoD conversion interrupt

UART0

Logic OR of 5 interrupts from UART channel 0

UART1

Logic OR of 5 interrupts from UART channel 1

UART2

Logic OR of 5 interrupts from UART channel 2

I2C0

Logic OR of transmit, receive, and error interrupts of I2C

channel 0

I2C1

Logic OR of transmit, receive, and error interrupts of I2C

channel 1

SSP0

Logic OR of all interrupts from SSP channel 0

SSP1

Logic OR of all interrupts from SSP channel 1

BROWNOUT

LVD warning interrupt

RTC

Logic OR of Alarm, Tamper, or Periodic Timer interrupts

Wake-Up (all)

Logic OR of all 32 inputs of Wake-Up unit (30 pins, RTC, and

USB Resume)

Wake-up Group 0

Logic OR of 8 interrupt sources: RTC, USB Resume, pins

P3.2 to P3.7

Wake-up Group 1

Logic OR of 8 interrupts from pins P5.0 to P5.7

Wake-up Group 2

Logic OR of 8 interrupts from pins P6.0 to P6.7

Wake-up Group 3

Logic OR of 8 interrupts from pins P7.0 to P7.7

USB

USB Bus Resume Wake-up (also input to wake-up unit)

31 (low priority)

PFQ-BC

Special use of interrupts from Prefetch Queue and Branch

Cache

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