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STR91XF 数据表(PDF) 46 Page - STMicroelectronics |
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STR91XF 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 72 page  Memory mapping STR91xF 46/72 Figure 9. STR91xx memory map 0x0000.0000 FLASH, I-TCM (1) SRAM, D-TCM (2) 0x0400.0000 0x2000.0000 Using 288 KB or 544 KB Using 64 KB or 96 KB 0x0800.0000 RESERVED Ext. MEM, CS3 Ext. MEM, CS2 Ext. MEM, CS1 Ext. MEM, CS0 64 MB 64 MB 64 MB 64 MB 0x2400.0000 0x2800.0000 0x2C00.0000 AHB BUFFERED 0x3000.0000 Ext. MEM, CS3 Ext. MEM, CS2 Ext. MEM, CS1 Ext. MEM, CS0 64 MB 64 MB 64 MB 64 MB 0x3400.0000 0x3800.0000 0x3C00.0000 AHB NON- BUFFERED 0x4000.0000 SRAM, AHB (2) FMI APB0 APB1 64 MB 64 MB 64 MB 64 MB 0x4400.0000 0x4800.0000 0x4C00.0000 AHB BUFFERED 0x5000.0000 SRAM, AHB (2) FMI APB0 APB1 64 MB 64 MB 64 MB 64 MB 0x5400.0000 0x5800.0000 0x5C00.0000 AHB NON- BUFFERED 0x6000.0000 USB EMI 8-CH DMA ENET 64 MB 64 MB 64 MB 64 MB 0x6400.0000 0x6800.0000 0x6C00.0000 AHB BUFFERED 0x7000.0000 USB EMI 8-CH DMA ENET 64 MB 64 MB 64 MB 64 MB 0x7400.0000 0x7800.0000 0x7C00.0000 RESERVED VIC1 VIC0 0x8000.0000 0xFC00.0000 0xFC01.0000 0xFFFF.F000 0xFFFF.FFFF 4 KB 64 KB AHB NON- BUFFERED AHB NON- BUFFERED 4 KB I2C1 4 KB APB0 CONFIG 4 KB WAKE-UP UNIT 4 KB GPIO PORT P0 4 KB GPIO PORT P1 4 KB GPIO PORT P2 4 KB GPIO PORT P3 4 KB GPIO PORT P4 4 KB GPIO PORT P5 4 KB GPIO PORT P6 4 KB GPIO PORT P7 4 KB GPIO PORT P8 4 KB GPIO PORT P9 4 KB TIM0 4 KB TIM1 4 KB TIM2 4 KB TIM3 4 KB APB1 CONFIG 4 KB RTC 4 KB SCU 4 KB IMC 4 KB UART0 4 KB UART1 4 KB UART2 4 KB SSP0 4 KB SSP1 4 KB CAN 4 KB ADC 4 KB WATCHDOG 4 KB I2C0 RESERVED APB0+0x0000.0000 PERIPHERAL BUS MEMORY SPACE (4) RESERVED APB0+0x0000.1000 APB0+0x0000.2000 APB0+0x0000.3000 APB0+0x0000.4000 APB0+0x0000.5000 APB0+0x0000.6000 APB0+0x0000.7000 APB0+0x0000.8000 APB0+0x0000.9000 APB0+0x0000.A000 APB0+0x0000.B000 APB0+0x0000.C000 APB0+0x0000.D000 APB0+0x0000.E000 APB0+0x0000.F000 APB1+0x0000.1000 APB1+0x0000.2000 APB1+0x0000.3000 APB1+0x0000.4000 APB1+0x0000.5000 APB1+0x0000.6000 APB1+0x0000.7000 APB1+0x0000.8000 APB1+0x0000.9000 APB1+0x0000.A000 APB1+0x0000.B000 APB1+0x0000.C000 APB1+0x0000.D000 APB1+0x0000.E000 APB1+0x03FF.FFFF RESERVED PERIPHERAL BUS, NON- BUFFERED ACCESS (3) PERIPHERAL BUS, BUFFERED ACCESS (3) TOTAL 4 GB CPU MEMORY SPACE 0x0000.0000 MAIN FLASH (BANK 0), 256KB or 512KB SECONDARY FLASH (BANK 1), 32KB MAIN FLASH (BANK 0), 256KB or 512KB SECONDARY FLASH (BANK 1), 32KB Order of the two Flash memories is user defined. (1) DEFAULT ORDER OPTIONAL ORDER APB1+0x0000.0000 APB0+0x0001.0000 APB0+0x03FF.FFFF APB BASE + OFFSET APB1, AHB- to-APB Bridge APB0, AHB- to-APB Bridge |
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