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ADL5960ACCZ-R2 数据表(PDF) 4 Page - Analog Devices |
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ADL5960ACCZ-R2 数据表(HTML) 4 Page - Analog Devices |
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4 / 32 page  Data Sheet ADL5960 SPECIFICATIONS analog.com Rev. A | 4 of 32 Table 1. Specifications (Continued) Parameter Test Conditions/Comments Min Typ Max Unit fRF = 15 GHz 47.7 dB fRF = 18 GHz 49.5 dB fRF = 20 GHz 51.7 dB LO INTERFACE LOP, LOM Input Frequency Range BYPASS = 1 0.01 to 20 GHz BYPASS = 0, LOMODE = 0 (divide by 2) 0.02 to 2.4 GHz BYPASS = 0, LOMODE = 1 (1×) 0.01 to 20 GHz BYPASS = 0, LOMODE = 2 (2×) 2 to 8 GHz BYPASS= 0, LOMODE = 3 (4×) 4 to 8 GHz Return Loss Characteristic impedance (ZO) = 100 Ω differential >10 dB Input Power −6 0 +6 dBm LO to RF Leakage BYPASS = 1, fLO −77.3 dBm BYPASS = 0, LOMODE = 0 (divide by 2), fLO/2 −83.4 dBm BYPASS = 0, LOMODE = 0 (divide by 2), fLO −72.1 dBm BYPASS = 0, LOMODE = 1 (1×), fLO −80.4 dBm BYPASS = 0, LOMODE = 2 (2×), fLO −86.4 dBm BYPASS = 0, LOMODE = 2 (2×), 2fLO −81.7 dBm BYPASS = 0, LOMODE = 3 (4×), fLO −93.4 dBm BYPASS = 0, LOMODE = 3 (4×), 2fLO −102 dBm BYPASS = 0, LOMODE = 3 (4×), 4fLO −92.1 dBm LO to IF Leakage fRF = 50 MHz, differential 13.6 dBV OFFSET FREQUENCY (OF) INTERFACE OFP, OFM Input Frequency Range 0.1 to 400 MHz OF Induced Spurious Tone at fIF4 OFMODE = 2 (divide by 4), 3fIF = 1.5 MHz −3.2 dBc 5fIF = 2.5 MHz −6.2 dBc 7fIF = 3.5 MHz −8.7 dBc Input Impedance Differential 10||0.5 kΩ||pF Voltage Swing Differential 0.125 0.5 2.0 V p-p IF OUTPUT INTERFACE IFFP/IFFM and IFRP/IFRM Output Frequency Range 0.1 to 100 MHz Maximum Peak-to-Peak Voltage Differential 8 V p-p Short-Circuit Output Current Single-ended, sourcing, output voltage = 0 V 200 mA Output Noise Spectral Density f = fIF = 500 kHz, FGAIN = RGAIN = 60 (decimal), differential 207 μV/√Hz VCM INTERFACE VCM Input Voltage Range 1.0 4.0 V Output VCM Error IF output common-mode voltage (VCM) −100 0 +100 mV Input Impedance 10k || 4p Ω || F ENABLE INTERFACE EN Logic Low Input Voltage 0.8 V Logic High Input Voltage 2.0 V Current into pin 20 µA SPI AND SYNC INTERFACE CS, SCK, SDIO, SYNC Logic Low Input Voltage 0.3 × OVDD V Logic High Input Voltage 0.7 × OVDD V Input Voltage Hysteresis 209 mV Current into Pin CS, SCK, SYNC 20 µA Logic Low Output Voltage SDIO, sinking 10 mA 0.3 × OVDD V Logic High Output Voltage SDIO, sourcing 10 mA 0.7 × OVDD V |
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