数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADL5960ACCZ-R2 数据表(PDF) 18 Page - Analog Devices

部件名 ADL5960ACCZ-R2
功能描述  10 MHz to 20 GHz Integrated Vector Network Analyzer Front End
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5960ACCZ-R2 数据表(HTML) 18 Page - Analog Devices

Back Button ADL5960ACCZ-R2 Datasheet HTML 14Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 15Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 16Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 17Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 18Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 19Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 20Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 21Page - Analog Devices ADL5960ACCZ-R2 Datasheet HTML 22Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 32 page
background image
Data Sheet
ADL5960
THEORY OF OPERATION
analog.com
Rev. A | 18 of 32
Phase synchronization between the ADL5960 devices is achieved
through the LO and offset frequency signals. For optimal accuracy,
it is preferable to match the propagation delays from the LO source
to each of the ADL5960 devices. Residual delay differences can
be addressed through calibration procedures for the VNA system.
Routing of the signal lines to the offset interface is less critical,
because these operate at much lower frequencies.
The SYNC interface is used to force the LO and offset dividers
in all ADL5960 devices to the same known initial state, such that
no phase ambiguities exist between the devices. A single pulse
applied to this input after power-on is sufficient to synchronize
all devices. Perform this synchronization before an LO signal is
applied. In that case the timing of the SYNC pulse is not critical.
For the optimal accuracy, simultaneous sampling of all ADL5960
IF channels is recommended. For high port counts, a multichannel
simultaneous sampling ADC can significantly reduce the solution
footprint. Some of these multichannel devices include built-in digital
downconversion (DDC) and decimation filters, which reduce the
amount of processing required in the digital signal processor (DSP).
The performance of the system can further be enhanced by insert-
ing a programmable RF filter in the RF path to filter any harmonic
content of the RF source, and a programmable attenuator to com-
pensate for tilt vs. frequency introduced by filters, switches, and
transmission lines.
Figure 54. Multiport Vector Network Analyzer Based on the ADL5960



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com