NXP Semiconductors

PCA9574

8-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt

INTERRUPT

MASK

VDD(IO)

P0 to P7

output port

register data

configuration

register

D

Q

CK

Q

data from

shift register

write

configuration

pulse

output port

register

D

Q

CK

write pulse

polarity

inversion

register

D

Q

CK

data from

shift register

write polarity

pulse

input port

register

D

Q

CK

read pulse

input port

register data

polarity

inversion

register data

002aad066

FF

data from

shift register

FF

FF

FF

Q1

Q2

VSS

to INT

BUS-HOLD

AND

PULL-UP/PULL-DOWN

CONTROL

ESD

protection

diode

100 kΩ

VDD(IO)

Figure 2. Simplified schematic of the I/Os (P0 to P7)

PCA9574

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Product data sheet

Rev. 6.0 — 31 May 2023

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