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ST72340 数据表(PDF) 160 Page - STMicroelectronics |
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ST72340 数据表(HTML) 160 Page - STMicroelectronics |
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160 / 191 page  ST72340, ST72344, ST72345 160/191 13.7 CLOCK AND TIMING CHARACTERISTICS Subject to general operating conditions for VDD, fOSC, and TA. 13.7.1 General Timings 13.7.2 External Clock Source Figure 93. Typical Application with an External Clock Source Notes: 1. Guaranteed by Design. Not tested in production. 2. Data based on typical application software. 3. Time measured between interrupt event and interrupt vector fetch. ∆t c(INST) is the number of tCPU cycles needed to finish the current instruction execution. 4. Data based on design simulation and/or technology characteristics, not tested in production. 13.7.3 Auto Wakeup from Halt Oscillator (AWU) Symbol Parameter 1) Conditions Min Typ 2) Max Unit tc(INST) Instruction cycle time fCPU=8MHz 23 12 tCPU 250 375 1500 ns tv(IT) Interrupt reaction time 3) tv(IT) = ∆tc(INST) + 10 fCPU=8MHz 10 22 tCPU 1.25 2.75 µs Symbol Parameter Conditions Min Typ Max Unit VOSC1H OSC1 input pin high level voltage see Figure 93 0.7xVDD VDD V VOSC1L OSC1 input pin low level voltage VSS 0.3xVDD tw(OSC1H) tw(OSC1L) OSC1 high or low time 4) 15 ns tr(OSC1) tf(OSC1) OSC1 rise or fall time 4) 15 IL OSCx Input leakage current VSS≤VIN≤VDD ±1 µA OSC1 OSC2 fOSC EXTERNAL ST72XXX CLOCK SOURCE Not connected internally VOSC1L VOSC1H tr(OSC1) tf(OSC1) tw(OSC1H) tw(OSC1L) IL 90% 10% Symbol Parameter Conditions Min Typ Max Unit fAWU AWU Oscillator Frequency 50 125 250 kHz tRCSRT AWU Oscillator startup time 50 µs |
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