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ST72340 数据表(PDF) 33 Page - STMicroelectronics

部件名 ST72340
功能描述  8-BIT MCU WITH UP TO 16K FLASH MEMORY, 10-BIT ADC, TWO 16-BIT TIMERS, TWO I2C, SPI, SCI
PDF  191 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST72340 数据表(HTML) 33 Page - STMicroelectronics

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7.5 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low Voltage Detector (LVD) and Auxiliary Volt-
age Detector (AVD) functions. It is managed by
the SICSR register.
Note: A reset can also be triggered following the
detection of an illegal opcode or prebyte code. Re-
fer to Section 12.2.1 on page 149 for further de-
tails.
7.5.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the VDD supply voltage is
below a VIT- reference value. This means that it
secures the power-up as well as the power-down
keeping the ST7 in reset.
The VIT- reference value for a voltage drop is lower
than the VIT+ reference value for power-on in order
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
VDD is below:
–VIT+ when VDD is rising
–VIT- when VDD is falling
The LVD function is illustrated in Figure 18.
The LVD is an optional function which can be se-
lected by option byte.
Note: LVD Threshold Configuration
The voltage threshold can be configured by option
byte to be low, medium or high. The configuration
should be chosen depending on the fOSC and VDD
parameters in the application. When correctly con-
figured, the LVD ensures safe power-on and pow-
er-off conditions for the microcontroller without us-
ing any external components.
To determine which LVD thresholds to use:
– Define the minimum operating voltage for the ap-
plication VAPP(min)
– Refer to the Electrical Characteristics section to
get the minimum operating voltage for the MCU
at the application frequency VDD(min) .
– Select the LVD threshold that ensures that the
internal RESET is released at VAPP(min) and ac-
tivated at VDD(MCUmin)
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Figure 18. Low Voltage Detector vs Reset
VDD
VIT+(LVD)
RESET
VIT-((LVD)
Vhys



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