ST7FL15F1MATRE datasheet(16/138 Pages) STMICROELECTRONICS

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ST7L15, ST7L19

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DATA EEPROM (cont’d)

5.4 POWER SAVING MODES

Wait mode

The data EEPROM can enter WAIT mode on exe-

cution of the WFI instruction of the microcontroller

or when the microcontroller enters ACTIVE HALT

mode.The data EEPROM immediately enters this

mode if there is no programming in progress, oth-

erwise the data EEPROM finishes the cycle and

then enters WAIT mode.

Active Halt mode

Refer to WAIT mode.

Halt mode

The data EEPROM immediately enters HALT

mode if the microcontroller executes the HALT in-

struction. Therefore, the EEPROM stops the func-

tion in progress, and data may be corrupted.

5.5 ACCESS ERROR HANDLING

If a read access occurs while E2LAT = 1, then the

data bus is not driven.

If a write access occurs while E2LAT = 0, then the

data on the bus is not latched.

If a programming cycle is interrupted (by RESET

action), the integrity of the data in memory is not

guaranteed.

5.6 DATA EEPROM READOUT PROTECTION

The readout protection is enabled through an op-

tion bit (see option byte section).

When this option is selected, the programs and

data stored in the EEPROM memory are protected

against readout (including a rewrite protection). In

Flash devices, when this protection is removed by

reprogramming the Option Byte, the entire Pro-

gram memory and EEPROM is first automatically

erased.

Note: Both Program Memory and data EEPROM

are protected using the same option bit.

Figure 8. Data EEPROM Programming Cycle

LAT

ERASE CYCLE

WRITE CYCLE

PGM

tPROG

READ OPERATION NOT POSSIBLE

WRITE OF

DATA LATCHES

READ OPERATION POSSIBLE

INTERNAL

PROGRAMMING

VOLTAGE

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