AT80C51RA2-RLSIV datasheet(20/85 Pages) IRF

20 / 85 page

4188E–8051–08/06

AT/TS8xC51Rx2

Figure 6-2.

Auto-reload Mode Up/Down Counter (DCEN = 1)

6.2.2

Programmable Clock-Output

In the clock-out mode, timer 2 operates as a 50%-duty-cycle, programmable clock generator

(See Figure 6-3) . The input clock increments TL2 at frequency FOSC/2. The timer repeatedly

counts to overflow from a loaded value. At overflow, the contents of RCAP2H and RCAP2L reg-

isters are loaded into TH2 and TL2. In this mode, timer 2 overflows do not generate interrupts.

The formula gives the clock-out frequency as a function of the system oscillator frequency and

the value in the RCAP2H and RCAP2L registers:

For a 16 MHz system clock, timer 2 has a programmable frequency range of 61 Hz

(FOSC/2

16) to 4 MHz (F

OSC/4). The generated clock signal is brought out to T2 pin (P1.0).

Timer 2 is programmed for the clock-out mode as follows:

• Set T2OE bit in T2MOD register.

• Clear C/T2 bit in T2CON register.

• Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L

registers.

• Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the reload value

or a different one depending on the application.

• To start the timer, set TR2 run control bit in T2CON register.

(DOWN COUNTING RELOAD VALUE)

C/T2

TF2

TR2

EXF2

TH2

(8-bit)

TL2

(8-bit)

RCAP2H

(8-bit)

RCAP2L

(8-bit)

FFh

(8-bit)

FFh

(8-bit)

TOGGLE

(UP COUNTING RELOAD VALUE)

TIMER 2

INTERRUPT

XTAL1

:12

OSC

FXTAL

T2CONreg

T2EX:

if DCEN=1, 1=UP

if DCEN=1, 0=DOWN

if DCEN = 0, up

counting

(:6 in X2 mode)

Clock OutFrequency

–

Fosc

65536

RCAP2H

–

RCAP2L

⁄

()

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