AT80C51RA2-RLSIV datasheet(45/85 Pages) IRF

45 / 85 page

4188E–8051–08/06

AT/TS8xC51Rx2

Figure 6-14. Power-Down Exit Waveform

Exit from power-down by reset redefines all the SFRs, exit from power-down by external inter-

rupt does no affect the SFRs.

Exit from power-down by either reset or external interrupt does not affect the internal RAM

content.

Note:

If idle mode is activated with power-down mode (IDL and PD bits set), the exit sequence is

unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and idle mode is

not entered.

Table 6-20.

The state of ports during idle and power-down mode

* Port 0 can force a "zero" level. A "one" will leave port floating.

INT1

INT0

XTAL1

Power-down phase

Oscillator restart phase

Active phase

Mode

Program

Memory

ALE

PSEN

PORT0

PORT1

PORT2

PORT3

Idle

Internal

Port Data*

Port Data

Idle

External

Floating

Port Data

Address

Port Data

Power-down

Internal

Port Data*

Port Data

Power-down

External

Floating

Port Data

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