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AT80C51RA2-RLSIV 数据表(PDF) 14 Page - International Rectifier |
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AT80C51RA2-RLSIV 数据表(HTML) 14 Page - International Rectifier |
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14 / 85 page  14 4188E–8051–08/06 AT/TS8xC51Rx2 Reset Value = XXXX XXX0b Not bit addressable F or further details on the X2 fe ature, please refer to ANM 072 ava ilable on the web (http://www.atmel.com) 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1- Reserved The value read from this bit is indeterminate. Do not set this bit. 0X2 CPU and peripheral clock bit Clear to select 12 clock periods per machine cycle (STD mode, F OSC=FXTAL/2). Set to select 6 clock periods per machine cycle (X2 mode, FOSC=FXTAL). Bit Number Bit Mnemonic Description |
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