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WM8731SEDS/R 数据表(PDF) 45 Page - Wolfson Microelectronics plc |
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WM8731SEDS/R 数据表(HTML) 45 Page - Wolfson Microelectronics plc |
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45 / 63 page ![]() WM8731 / WM8731L Production Data w PD Rev 4.3 August 2006 45 3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE The WM8731/L can be controlled using a 3-wire serial interface. SDIN is used for the program data, SCLK is used to clock in the program data and CSB is use to latch in the program data. The 3-wire interface protocol is shown in Figure 33. CSB SCLK SDIN B15 B6 B7 B8 B9 B10 B11 B12 B13 B14 B1 B2 B3 B4 B5 B0 Figure 33 3-Wire Serial Interface Notes: 1. B[15:9] are Control Address Bits 2. B[8:0] are Control Data Bits 3. CSB is edge sensitive not level sensitive. The data is latched on the rising edge of CSB. 2-WIRE SERIAL CONTROL MODE The WM8731/L supports a 2-wire MPU serial interface. The device operates as a slave device only. The WM8731/L has one of two slave addresses that are selected by setting the state of pin 15, (CSB). SDIN SCLK ACK R ADDR ACK DATA B15-8 STOP START DATA B7-0 R/W ACK Figure 34 2-Wire Serial Interface Notes: 1. B[15:9] are Control Address Bits 2. B[8:0] are Control Data Bits CSB STATE ADDRESS 0 0011010 1 0011011 Table 25 2-Wire MPU Interface Address Selection To control the WM8731/L on the 2-wire bus the master control device must initiate a data transfer by establishing a start condition, defined by a high to low transition on SDIN while SCLK remains high. This indicates that an address and data transfer will follow. All peripherals on the 2-wire bus respond to the start condition and shift in the next eight bits (7-bit address + R/W bit). The transfer is MSB first. The 7-bit address consists of a 6-bit base address + a single programmable bit to select one of two available addresses for this device (see table 24). If the correct address is received and the R/W bit is ‘0’, indicating a write, then the WM8731/L will respond by pulling SDIN low on the next clock pulse (ACK). The WM8731/L is a write only device and will only respond to the R/W bit indicating a write. If the address is not recognised the device will return to the idle condition and wait for a new start condition and valid address. |
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