WM8731SEDSSLASHR datasheet(30/63 Pages) WOLFSON

30 / 63 page

WM8731 / WM8731L

Production Data

PD Rev 4.3 August 2006

A zero cross detect circuit is provided at the input to the headphones under the control of the LZCEN

and RZCEN bits of the headphone output control register. Using these controls the volume control

values are only updated when the input signal to the gain stage is close to the analogue ground level.

This minimises and audible clicks and zipper noise as the gain values are changed or the device

muted. Note that this circuit has no time out so if only DC levels are being applied to the gain stage

input of more than approximately 20mV, then the gain will not be updated. This zero cross function is

enabled when the LZCEN and RZCEN bit is set high during a volume register write. If there is

concern that a DC level may have blocked a volume change (one made with LZCEN or RZCEN set

high) then a subsequent volume write of the same value, but with the LZCEN or RZCEN bit set low

will force a volume update, regardless of the DC level.

LHPOUT and RHPOUT volume and zero-cross setting can be changed independently. Alternatively,

the user can lock the two channels together, allowing both to be updated simultaneously, halving the

number of serial writes required, provided that the same gain is needed for both channels. This is

achieved through writing to the HPBOTH bit of the control register. Setting LRHPBOTH whilst writing

to LHPVOL and LZCEN will simultaneously update the Right Headphone controls similarly. The

corresponding effect on updating RLHPBOTH is also achieved.

The software control is given in Table 9.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

6:0

LHPVOL[6:0]

1111001

( 0dB )

Left Channel Headphone Output

Volume Control

1111111 = +6dB

. . 1dB steps down to

0110000 = -73dB

0000000 to 0101111 = MUTE

LZCEN

Left Channel Zero Cross detect

Enable

1 = Enable

0 = Disable

0000010

Left

Headphone

Out

LRHPBOTH

Left to Right Channel Headphone

Volume, Mute and Zero Cross Data

Load Control

1 = Enable Simultaneous Load of

LHPVOL[6:0] and LZCEN to

RHPVOL[6:0] and RZCEN

0 = Disable Simultaneous Load

6:0

RHPVOL[6:0]

1111001

( 0dB )

Right Channel Headphone Output

Volume Control

1111111 = +6dB

. . 1dB steps down to

0110000 = -73dB

0000000 to 0101111 = MUTE

RZCEN

Right Channel Zero Cross Detect

Enable

1 = Enable

0 = Disable

0000011

Right

Headphone

Out

RLHPBOTH

Right to Left Channel Headphone

Volume, Mute and Zero Cross Data

Load Control

1 = Enable Simultaneous Load of

RHPVOL[6:0] and RZCEN to

LHPVOL[6:0] and LZCEN

0 = Disable Simultaneous Load

Table 9 Headphone Output Software Control

WM8731SEDS/R 数据表(PDF) 30 Page - Wolfson Microelectronics plc

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