| 数据搜索系统,热门电子元器件搜索 |
|
AS7331 数据表(PDF) 43 Page - OSRAM GmbH |
|
|
|||||||||||||||||||||||||||||
AS7331 数据表(HTML) 43 Page - OSRAM GmbH |
|
43 / 72 page ![]() Document Feedback AS7331 Functional Description Datasheet • PUBLIC DS001047 • v4-00 • 2023-Mar-24 71 │ 42 Equation 7: C C TEMP T CHIP 9 . 66 05 . 0 In other words TEMP = 922h (2338 dec) corresponds to 50 °C as a reference point to start calculations. The temperature measurement is available in the measurement modes CONT, CMD, and SYNS. With the values of CREG1:TIME < 2 dec, the resolution of the temperature measurement is reduced, but in this case, the output value of TEMP is internally corrected. In the SYND measurement mode, it is important to enable the conversion time measurement (CREG2:EN_TM = “1”) to get any result of the temperature measurement. In addition, the value of output register, OUTCONV has to be more than 212, given by the external conversion time at the SYN pin. 7.8 I²C Communication The two-wired serial interface is compatible with the fast mode I²C protocol, with a bit rate of up to 400 kbit/s. The AS7331 exclusively operates as a slave with its slave address [6:0] = (1, 1, 1, 0, 1, A1, A0). The input pins A1 and A0, which allows running four AS7331 on the same I²C bus concurrently, define the two lowest-order bits. Within the AS7331, the SCL pin of the I²C interface is realized as an input pin, where in single master applications, the I²C master could drive the SCL line with a push-pull stage. In all other cases, the requirements for bus termination using standard pull-up according to the I²C (pins SCL and SDA) should be considered - especially regarding noise environments and EMC in PCB design. For the I²C interface, the timing diagram and its timing specification, please see Figure 39. Clock stretching is not supported by the AS7331. I²C commands towards the AS7331 take effect after the end of the I²C write cycle (I²C Stop condition). Each data transfer begins with a start (S) condition, defined by a high to low transition of SDA while SCL is high. The transfer is terminated by a stop (P) condition, which is defined by a low to high transition of SDA while SCL is high. A repeated start condition (Sr) can be generated instead of a stop condition if the transfer should be continued with a new data block. The start and repeated start conditions are functionally equivalent. Figure 36: Start and Stop Conditions of the I²C Bus Sr P S SDA SCL S = START condition Sr = repeated START condition P = STOP condition |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |