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AS7331

Functional Description

Datasheet

• PUBLIC

DS001047

• v4-00 • 2023-Mar-24

│ 47

Figure 42:

Example of Addressing the AS7331 to Read the Configuration Registers

Figure 43:

Example of Addressing the AS7331 to Read the Measurement Result Registers Starting at

Address 4h

The access of the result register bank with 2 byte addresses each (starting with the low byte), which is

only possible within the measurement state, has a special feature (see Figure 43). After reaching the

last valid result register address (4h or 6h if SYND mode is activated with CREG2:EN_TM =

“1”) the

next result register address is the default one, 2h, during read on. The setback of the result register

address 2h in the measurement mode does not take place if an address was set above the valid

addressable space.

06h

9Ch

CBh

SLAVE

ADDR.

R/W

1 1 1 0 1 0 0

E8h

address CREG1

write EDGES

write BREAK

10h

52h

01h

data transferred from slave to master

data transferred from master to slave

A: acknowledge

NA: not acknowledge

write CREG1

write CREG2

write CREG3

S: START cond.

Sr: repeated START condition

P: STOP cond.

SLAVE

ADDR.

R/W

1 1 1 0 1 0 0

E8h

04h

address MRES3

SLAVE

ADDR.

1 1 1 0 1 0 0

E9h

MRES1

read low byte

read high byte

R/W

MRES3

reg. addr.:

read low byte

read high byte

. . . NA P

data transferred from slave to master

data transferred from master to slave

A: acknowledge

NA: not acknowledge

P: STOP cond.

AS7331 数据表(PDF) 48 Page - OSRAM GmbH

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