AS6221T

Register description

Datasheet

• PUBLIC • Document Feedback

DS001032

• v3-00 • 2023-Oct-13

26 / 36

/

Polarity bit

Alert condition

Alert condition bit (AC-Bit)

1

T ≤ TLOW

0

6.3.9

High speed mode

The bus operation is limited to 400 kHz unless a high speed command is issued by the master

device as the first byte after a START condition. This switches the bus to a high speed

operation which allows data transfer frequencies up to 3.4 MHz. Such a command is not

acknowledged by the slave but the input filter time constants on the serial interface (SDA and

SCL) are adapted to allow the higher transfer rate.

After a high speed command, the slave address is transmitted by the master in order to invoke

a data transfer. The bus keeps operating at the higher operating frequency until the master

issues a STOP condition on the serial bus. Upon the reception of the STOP condition by the

slave, the input filters are switched to their initial time constants which allow lower transfer

rates only.

6.3.10

General call

A general call is issued by the master by transmitting the general call address (000 0000) with

a low R/W bit. When this command is issued on the bus, the device acknowledges this

command. The device also acknowledges the second byte but ignores the data. Subsequent

bytes sent by the master during the general call are not acknowledged.

6.3.11

Start byte

When the master transmits address 000 0000 and

a high R/W bit (“START byte”) the device

acknowledges the address. The device then send the MSB data byte and LSB data byte,

where the data corresponds to the content of the register whose address has been last written

to. After reset this corresponds to the temperature register.

6.3.12

Timeout function

The serial interface of the slave device is reset if the clock signal SCL is kept low for typ.

30 ms. Such a condition results in a release of the data line by the slave in case it has been