AS6221T

Register description

Datasheet

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pulled to low level. The slave remains inactive after a timeout and waits for a new START

command invoked by the bus master. In order to prevent a timeout, the bus transfer rate must

be higher than 1 kHz.

6.3.13

Bus conditions

The following conditions occur on the serial bus which is compatible to the I²C-Bus.

Bus idle

The signals SDA and SCL are not actively driven and pulled to a high level by an external pull-

up resistor.

Start data transfer

A transition of the SDA input from high to low level while the SCL signal is kept at high level

results in a START condition. Such a START condition must precede any data transfer.

Stop data transfer

A transition of the SDA input from low to high level while the SCL signal is kept at high level

results in a STOP condition. Any data transfer is finished by generating a STOP or START

condition.

Data transfer

The master device defines the number of data bytes between a START and STOP condition

and there is no limitation in the amount of data to be transmitted.

If it is desired to read only a single MSB byte without the LSB byte, a termination of the data

transfer can be provoked by issuing a START or STOP condition on the bus.

Acknowledge

It is mandatory for each slave device to respond with acknowledge if the device is addressed

by the master. Acknowledge is indicated by pulling down the data line (SDA) while the clock

signal (SCL) is high in the acknowledge clock phase. In order to avoid an unwanted START or

STOP condition on the bus, setup and hold times must be met.

The master can signal an end of data transmission by transmitting a Not-Acknowledge on the

last transmitted data byte by keeping the acknowledge bit at high level.