LTM4659EVPBF datasheet(6/26 Pages) AD

6 / 26 page

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

LTM4659

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

GND (Pins A1, A2, B2, C2, D2, E1, E2): Power Ground

Pins for both Input and Output Returns.

VIN (Pins A3, B3, C3): The VIN pins supply current to the

internal circuitry and topside power switch. All of the VIN

pins must be connected together with short, wide traces

and bypassed to PGND with low ESR capacitors located

as close as possible to the pins.

COMP (Pin A4): The COMP pin is the compensation

node for the output voltage regulation control loop.

Compensation components connected to this pin are

referenced to AGND.

RUN (Pin A5): Run the Control Input of each Switching

Mode Regulator Channel. Enables chip operation by

connecting RUN above 0.4V. Connecting it to GND shuts

down the part.

SW (Pins B1, C1, D1): Switching Node Internal High

Current Path from MOSFET to Inductor. Connect with a

solid cooper area or leave it floating.

FB (Pin B4): The negative input of the error amplifier for

the switching mode regulator. The LTM4659 regulates

the voltage between FB and AGND to 500mV. A resis-

tor divider connecting to VOUT sets the output voltage.

In PolyPhase® operation, connecting the FB pins of the

subordinate channels to VIN to disable the internal error

amplifier. See the Applications Information section for

details.

VOUT (Pins B5, C5, D5, E5): Power Output Pins of Each

Switching Mode Regulator. Apply output load between

these pins and GND pins. Recommend placing output

decoupling capacitance directly between these pins and

the GND pins.

AGND (Pin C4): The AGND pin is the ground reference

for the internal analog circuitry, including the bandgap

voltage reference. To achieve good load regulation, con-

nect the AGND pin to the negative terminal of the output

capacitor (COUT) at the load. A drop in the high current

power ground return path will be compensated. All of

the signal components, such as the FB resistor divid-

ers and soft-start capacitor, should be referenced to the

AGND node. The AGND node carries very little current

and, therefore, can be a minimal size trace.

MODE/SYNC (Pin D3): The MODE/SYNC pin facilitates

multiphase operation and synchronization to an external

clock. Depending on the mode of operation, the MODE/

SYNC pin either accepts an input clock pulse or outputs

a clock pulse at its operating frequency. (See Multiphase

Operation in the Applications Information section). The

MODE/SYNC pin also programs the mode of operation:

pulse-skipping or forced continuous mode.

SSTT (Pin D4): Soft-Start, Tracking, and Temperature

Monitor Pin. An internal 10μA current into an external

capacitor on the soft-start pin programs the output volt-

age ramp rate during start-up. When SSTT is below 0.5V,

the VFB pin voltage will track the SSTT pin voltage. When

SSTT is above 0.5V, the tracking function is disabled. The

internal reference resumes control of the error amplifier

and the SSTT pin servos to a voltage representative of

junction temperature. For a clean recovery from an output

short-circuit condition, the SSTT pin is pulled down to

approximately 140mV above the VFB voltage, and a new

soft-start cycle is initiated. During shutdown and fault

conditions, the SSTT pin is pulled to ground.

PGOOD (Pin E3): Output Power Good with Open-Drain

Logic of the Switching Mode Regulator Channel. PGOOD

is pulled to ground when the voltage on the FB pin is not

within −3%/10% of the internal 0.5V reference.

FREQ (Pin E4): The FREQ pin sets the oscillator frequency

with an external resistor to AGND or sets the phasing for

multiphase operation. (See Multiphase Operation in the

Applications Information section).

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