LTM4659EVPBF datasheet(16/26 Pages) AD

16 / 26 page

LTM4659

Rev. 0

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As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters defined by JESD51-12 or provided in the Pin

Configuration section replicates or conveys normal op-

erating conditions of a μModule. For example, in normal

board-mounted applications, never does 100% of the

device’s total power loss (heat) thermally conduct exclu-

sively through the top or exclusively through bottom of the

µModule—as the standard defines for θJCtop and θJCbot,

respectively.Inpractice,powerlossisthermallydissipated

in both directions away from the package—granted, in the

absence of a heat sink and airflow, a majority of the heat

flow is into the board.

Within a SIP (system-in-package) module, be aware that

there are multiple power devices and components dis-

sipating power, with the consequence that the thermal

resistances relative to different junctions of components

or die are not exactly linear with respect to total pack-

age power loss. To reconcile this complication without

sacrificing modeling simplicity—but also, not ignoring

practical realities—an approach has been taken using

FEA software modeling along with laboratory testing in

a controlled-environment chamber to reasonably define

andcorrelatethethermalresistancevaluessuppliedinthis

data sheet: (1) Initially, FEA software is used to accurately

build the mechanical geometry of the µModule and the

specified PCB with all of the correct material coefficients

along with accurate power loss source definitions; (2)

this model simulates a software-defined JEDEC environ-

ment consistent with JESD51-9 to predict power loss

heat flow and temperature readings at different interfaces

that enable the calculation of the JEDEC-defined thermal

resistance values; (3) the model and FEA software is used

to evaluate the µModule with heat sink and airflow; (4)

having solved for and analyzed these thermal resistance

values and simulated various operating conditions in

the software model, a thorough laboratory evaluation

replicates the simulated conditions with thermocouples

within a controlled-environment chamber while operat-

ing the device at the same power loss as that which was

simulated. An outcome of this process and due-diligence

yields a set of derating curves provided in other sections

of this data sheet.

APPLICATIONS INFORMATION

The 2.5VIN, 3.3VIN and 5VIN power loss curves in Figure 6,

Figure 7, and Figure 8 can be used in coordination with the

load current derating curves in Figure 9 to Figure 14 for

calculating an approximate θJA thermal resistance for the

LTM4659withvariousheatsinkingandairflowconditions.

The power loss curves are taken at room temperature,

and are increased with multiplicative factors according to

the junction temperature. This approximate factor is ~1.2

assuming the junction temperature is reaching 120°C.

The maximum load current is achievable while increasing

ambient temperature as long as the junction temperature

is less than 120°C, which is a 5°C guardband from the

maximum junction temperature of 125°C. When the

ambient temperature reaches a point where the junction

temperature is 120°C, then the load current is lowered to

maintainthejunctionat120°Cwhileincreasingtheambient

temperature up to 120°C. The derating curves are plotted

with the output current starting at 10A and the ambient

temperature at 30°C. The output voltages are 1.0V, 1.5V

and2.5V.Thesearechosentoincludethelowerandhigher

output voltage ranges to correlate the thermal resistance.

Thermal models are derived from several temperature

measurementsinacontrolledtemperaturechamber,along

withthermalmodelinganalysis.Thejunctiontemperatures

are monitored while ambient temperature is increased

with and without airflow. The power loss increase with

ambient temperature change is factored into the derating

curves. The junctions are maintained at 120°C maximum

while lowering output current or power with increasing

ambient temperature. The decreased output current will

decrease the internal module loss as ambient tempera-

ture is increased. The monitored junction temperature of

120°C minus the ambient operating temperature specifies

how much module temperature rise can be allowed. For

example,todeterminethemaximumambienttemperature

allowable when VIN=3.3V,VOUT=1Vand10Aloadcurrent

withoutaheatsinkandairflow,findoutthepowerlossfrom

Figure 7, which equals to 2.24W in this case, then multiply

by the 1.2 coefficient for 120°C junction temperature, If

the 65.4°C ambient temperature is subtracted from the

120°C junction temperature, then the difference of 54.6°C

divided by 2.7W equals a 20.2°C/W for θJA the system

equivalent thermal resistance. Table 5 specifies a 21°C/W

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