LTM4659EVPBF datasheet(11/26 Pages) AD

11 / 26 page

LTM4659

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

Multiphase Operation

For output loads that demand more than 10A of current,

multiple LTM4659s can be paralleled to run out of phase

to provide more output current without increasing input

and output voltage ripples. See Table 3.

ToparallelmultipleLTM4659modulestoachievethesame

switching frequency, a perfect interleaved phase shift and

an accurate current sharing between different modules,

one of the LTM4659 will become the main module, and

the rest of the LTM4659s need to be programmed to be

subordinate modules. See Multiphase Operation in the

Applications Information section.

1. Connect a resistor from the FREQ pin to the AGND of

the main phase will program the frequency and con-

figures the MODE/SYNC pin to become a clock output

used to drive the MODE/SYNC pins of the subordinate

phase(s).

Connecting the FREQ pin of the main phase to VIN

configures the MODE/SYNC pin to become an input

capable of accepting an external clock. The switching

frequency defaults to the nominal 2MHz internal fre-

quency when the external clock is unavailable, such as

during start-up.

Connecting the FB pin to VIN configures a phase as

a subordinate. The MODE/SYNC becomes an input,

and the voltage control loop is disabled. The subordi-

nate phase current control loop is still active, and the

peak current is controlled via the shared COMP node.

Careful consideration should be taken when routing the

COMP node between phases. Routing the COMP and

AGND nodes together is recommended to create a low

inductance path.

Connecting the PGOOD pins together and adding an

external pull-up resistor allows the main phase to com-

municate with the subordinate phases on when start-

up has been completed.

The pull-up voltage should be greater than 0.49V for

subordinate channels on multiphase operations.

2. The phasing of a subordinate phase relative to the main

phase is programmed with a resistor divider on the

FREQ pin (see Figure 2). Use of 1% resistors is recom-

mended. See Table 4 for more information.

When configured for main/subordinate operation, the

subordinate phases operate in FCM.

Table 3. Multiphase Configuration

MAIN/SUBORDINATE

FREQ PIN

FB PIN

MODE/SYNC PIN

SWITCHING FREQUENCY (fSW)

Main

VIN

VOUT Divider

Clock Input

External Clock/2MHz Default

Main

Resistor to AGND

VOUT Divider

Clock Output

FREQ Programmed

Subordinate

VIN Divider

VIN

Clock Input

External Clock

Table 4. Programming Subordinate Phase Angle

SYNC PHASE ANGLE

RATIO

EXAMPLE

0°

0Ω

90°

3 • R

301k

100k

120°

7 • R

5 • R

243k

174k

180°

0Ω

240°

5 • R

7 • R

174k

243k

270°

3 • R

100k

301k

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