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LTM4659EVPBF 数据表(PDF) 14 Page - Analog Devices

部件名 LTM4659EVPBF
功能描述  Ultrathin, Low VIN 10A Step-Down DC/DC μModule Regulator
PDF  26 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LTM4659EVPBF 数据表(HTML) 14 Page - Analog Devices

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LTM4659
14
Rev. 0
For more information www.analog.com
components of the typical application circuits are a good
starting point for component values. The output voltage
settling behavior is related to the stability of the closed-
loop system. For a detailed explanation of optimizing the
compensation components, including a review of control
loop theory, refer to the Analog Devices Application Note
76.
RUN Threshold Programming
The LTM4659 has a precision threshold RUN pin to en-
able or disable switching. Pulling the RUN pin to ground
forces the LTM4659 into its shutdown state, turning off
both power MOSFETs and most of its internal control
circuitry. Bringing the RUN pin above 0.4V will turn on
the entire chip.
The rising threshold of the RUN comparator is 400mV
with 60mV of hysteresis. Connect the RUN pin to VIN if
the shutdown feature is not used. Adding a resistor divider
from VIN to RUN programs the LTM4659 to regulate the
output only when VIN is above a desired voltage (see the
Block Diagram). Typically, this threshold, VIN(RUN),isused
in situations where the input supply is current limited or
has a relatively high source resistance. A switching regula-
tor draws constant power from the source, so the source
current increases as the source voltage drops. This looks
like a negative resistance load to the source and can cause
the source to current limit or latch low under low source
voltage conditions. The VIN(RUN) threshold prevents the
regulator from operating at source voltages where prob-
lems may occur. This threshold can be adjusted by setting
the values R1 and R2 such that they satisfy Equation 8.
VIN(RUN) =
R1
R2
+1
⎛
⎝
⎜
⎞
⎠
⎟• 400mV
(8)
where the LTM4659 will remain off until VIN is above
VIN(RUN). Due to the comparator’s hysteresis, switching
will not stop until the input falls slightly below VIN(RUN).
Alternatively, a resistor divider from an output of another
regulator to the enable RUN pin of the LTM4659 provides
event-based power up sequencing, enabling the LTM4659
when the output of the other regulator reaches a prede-
termined level.
Output Overvoltage Protection
During an output overvoltage event, when the FB pin volt-
age is greater than 110% of nominal, the LTM4659 top
power switch will be turned off. If the output remains out
of regulation for more than 100μs, the PGOOD pin will be
pulledlow.Anoutputovervoltageeventshouldnothappen
under normal operating conditions.
Output Short-Circuit Protection and Recovery
The peak inductor current at which the current compara-
tor shuts off the top power switch is controlled by the
voltage on the COMP pin. If the output current increases,
the error amplifier raises the COMP pin voltage until the
average inductor current matches the new load current. In
normal operation, the LTM4659 clamps at the maximum
COMP pin voltage.
When the output is shorted to ground, the inductor current
decays very slowly during the switch-off time because of
the low voltage across the inductor. To keep the current
in control, a secondary limit is also imposed on the valley
inductorcurrent.Iftheinductorcurrentmeasuredthrough
the bottom power switch increases beyond IVALLEY(MAX),
the top power switch will be held off and switching cycles
will be skipped until the inductor current is reduced.
Recovery from a short circuit can be abrupt, and because
the output is shorted and below regulation, the regulator
is requesting the maximum current to charge the output.
When the short circuit condition is removed, the inductor
current could cause an extreme voltage overshoot in the
output. The LTM4659 addresses this potential issue by
regulatingtheSSTTvoltagejustabovetheFBvoltagewhen
the output is out of regulation. Therefore, a recovery from
an output short circuit goes through a soft-start cycle. The
output ramp is controlled, and the overshoot is minimized.
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configuration
section are consistent with those parameters defined by
JESD51-9. They are intended for use with finite element
analysis (FEA) software modeling tools that leverage the
outcome of thermal modeling, simulation, and correlation
APPLICATIONS INFORMATION



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