ADC3908CSSS datasheet(51/131 Pages) TI1

部件名	ADC3908CSSS

功能描述	ADC3910Dx and ADC3910Sx 10-bit, 25 to 125MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers

PDF	131 Pages

Scroll/Zoom	100%

制造商	TI1 [Texas Instruments]

网页	http://www.ti.com

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51 / 131 page

6.5.1.2 Register Read

The device includes a mode where the contents of the internal registers can be read back using the SDIO pin.

This readback mode can be useful as a diagnostic check to verify the serial interface communication between

the external controller and the ADC. The procedure to read the contents of the serial registers is as follows:

1. Drive the SEN pin low

2. Set the R/W bit to 1. This setting disables any further writes to the registers. Initiate a serial interface cycle

specifying the address of the register (A[14:0]) whose content must be read

3. The device latches the contents (D[7:0]) of the selected register on the SDIO pin on SCLK falling edge

4. The external controller can capture the contents on the SCLK rising edge

Figure 6-34 show the timing requirements for the serial register Read operation.

OZD

ODZ

A12

A11

A10

A14

A13

SDATA

SCLK

SEN

R/W

Figure 6-34. Serial Register Read Timing Diagram

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ADC3910D025, ADC3910D065, ADC3910D125

ADC3910S025, ADC3910S065, ADC3910S125

SBASAD1A – DECEMBER 2023 – REVISED MAY 2024

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ADC3908CSSS 数据表(PDF) 51 Page - Texas Instruments