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ADC3908CSSS 数据表(PDF) 112 Page - Texas Instruments |
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ADC3908CSSS 数据表(HTML) 112 Page - Texas Instruments |
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112 / 131 page  Table 6-259. 0x1CC Register Field Descriptions Bit Field Type Reset Description 7:0 ALERT_STICKY__7:0 R/W 0h Signals set as sticky for ALERT pin, that is, once triggered remains triggered until cleared in ALERT STICKY CLR MASK. This register is a mask so multiple signals can be set as sticky simultaneously by enabling the corresponding bit. See register 0x1B4 for bit mask. 6.6.3.9 0x1CD Register (Address = 1CDh) [Reset = 00h] Return to the Summary Table. Table 6-260. 0x1CD Register Field Descriptions Bit Field Type Reset Description 7:0 ALERT_STICKY__15:8 R/W 0h Signals set as sticky for ALERT pin, that is, once triggered remains triggered until cleared in ALERT STICKY CLR MASK. This register is a mask so multiple signals can be set as sticky simultaneously by enabling the corresponding bit. See register 0x1B4 for bit mask. 6.6.3.10 0x1CE Register (Address = 1CEh) [Reset = 0h] Return to the Summary Table. Table 6-261. 0x1CE Register Field Descriptions Bit Field Type Reset Description 0 ALERT_STICKY__18:16 R/W 0h Signals set as sticky for ALERT pin, that is, once triggered remains triggered until cleared in ALERT STICKY CLR MASK. This register is a mask so multiple signals can be set as sticky simultaneously by enabling the corresponding bit. See register 0x1B4 for bit mask. 6.6.3.11 0x1D8 Register (Address = 1D8h) [Reset = 00h] Return to the Summary Table. Table 6-262. 0x1D8 Register Field Descriptions Bit Field Type Reset Description 7:0 ALERT_STICKY_CLR__7: 0 R/W 0h Signals set as sticky for ALERT pin. This register is a mask so multiple signals can be set as sticky simultaneously by enabling the corresponding bit. See register 0x1B4 for bit mask. 6.6.3.12 0x1D9 Register (Address = 1D9h) [Reset = 00h] Return to the Summary Table. Table 6-263. 0x1D9 Register Field Descriptions Bit Field Type Reset Description 7:0 ALERT_STICKY_CLR__1 5:8 R/W 0h Signals set as sticky for ALERT pin. This register is a mask so multiple signals can be set as sticky simultaneously by enabling the corresponding bit. See register 0x1B4 for bit mask. 6.6.3.13 0x1DA Register (Address = 1DAh) [Reset = 0h] Return to the Summary Table. ADC3910D025, ADC3910D065, ADC3910D125 ADC3910S025, ADC3910S065, ADC3910S125 SBASAD1A – DECEMBER 2023 – REVISED MAY 2024 www.ti.com 112 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125 |
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