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STR910FAM32X6 数据表(PDF) 61 Page - STMicroelectronics |
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STR910FAM32X6 数据表(HTML) 61 Page - STMicroelectronics |
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61 / 78 page ![]() STR91xFA Electrical characteristics 61/78 Table 26. EMI write operation Notes: 1 ALE_LENGTH = 1 by default (can be programmed to be 2 by setting the bits In the SCU_SCR0 register) 2 WSTWR =1Fh by default (WR wait state time = WSTWR x tBCLK, WSTWR can be programmed in the EMI_WCRx Register) 3 WSTWEN= 0 by default (WR assertion delay from chip select. WSTWEN can be programmed in the EMI_WECRx Register) 4 When the CPU executes a 16-bit write to a x8 EMI bus, the second write cycle's address setup time is defined as tWAS=(WSTWEN - ½) x tBCLK Symbol Parameter Test Conditions Value Unit Min Max tWCR WRn to CSn inactive (tBCLK/2) - 1 (tBCLK/2) +1 ns tWP Write Pulse Width (WSTWR-WSTWEN + 1) x tBCLK - 1 (WSTWR-WSTWEN + 1) x tBCLK + 1 ns tWDS Write Data Setup Time (non-mux mode) (WSTWEN + 1/2) x tBCLK ns Write Data Setup Time (mux mode ) ALE length=1 WSTWEN>2 (WSTWEN - 1.5) x tBCLK ALE length=2 WSTWEN>3 (WSTWEN - 2.5) x tBCLK tWDH Write Data Hold Time (tBCLK/2) - 1 (tBCLK/2) + 1 ns tWAS Write Address Setup Time (WSTWEN + 1/2) x tBCLK -1 4) (WSTWEN + 1/2) x tBCLK +1 4) ns tWAH Write Address Hold Time tBCLK/2 ns tAW ALE pulse width (ALE_LENGTH x tBCLK )-1 (ALE_LENGTH x tBCLK ) +1 ns tAAH Address to ALE hold time (tBCLK/2) -1 (tBCLK/2) + 1 ns tAAS Address to ALE setup time (ALE_LENGTH x tBCLK)- 1 ns |
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