STPM01 datasheet(22/56 Pages) STMICROELECTRONICS

22 / 56 page

Theory of operation

STPM01

22/56

8.9

Error detection

In addition to the no load condition and the line frequency band, the integration of power can

be suspended also due to detected error on the source signals.

There are two kinds of error detection circuits involved. The first checks all the

∑∆ signals

from the analog part if any is stacked at 1 or 0 within the 1/128 of fCLK period of observation.

In case of detected error the corresponding

∑∆ signal is replaced with an idle ∑∆ signal,

which represents a constant value 0. All error and other resolved flags are treated as bits of

a device status and can be read out by means of SPI interface.

Another error condition occurs if the MOP, MON and LED pin outputs signals are different

from the internal signals that drive them. This can occur if some of this pin is forced to GND

or to some other imposed voltage value. In this case the internal status bit PIN is activated

providing the information that some hardware problem has been detected, for example the

stepper motor has been mechanically blocked.

8.10

Tamper detection module

The STPM01 is able to measure the current in both live and neutral wire. This mechanism is

adopted to implement anti-tamper function. If this function is selected (see Table 10), the

live and neutral wire currents are monitored; when a difference between the two

measurements is detected, the STPM01 enters the Tamper State, while when there is a

very small difference between the two channels the STPM01 is in Normal state.

In particular, both channels are not observed all the time, rather a time multiplex mechanism

is used. During the observation time of the selected channel, its active energy is calculated.

The detection of a tamper condition occurs when the absolute value of the difference

between the two active energy values is greater than a certain percentage of the averaged

energy during the activated tamper module. This percentage value can be selected between

two different values (12.5% and 6.25%) according to the value of the configuration bit CRIT.

The tamper condition will be detected when the following formula will be satisfied:

EnergyCH1 - EnergyCH2 > KCRIT (EnergyCH1 + EnergyCH2)/2; where KCRIT can be 12.5%

or 6.25%.

The detection threshold is much higher than the accuracy difference of the current

channels, which should be less than 0.2%, but, some headroom should be left for possible

transition effect, due to accidental synchronism of actual load current change with the

rhythm of taking the energy samples.

The tamper circuit works if the energies associated with the two current channels will be

both positive or negative, if the two energies will have different sign, the tamper will be on all

the time however, the channel with the associated higher power will be selected for the final

computation of energy.

In single wire mode, the Apparent energy rather then the active is used for Tamper

detection.

8.10.1

Detailed operational description

Normal state

The meter is initially set to normal state, i.e. tamper not detected. In such state, we expect

that the values of both load currents should not differ more than the accuracy difference of

the channels does. For this reason, we can use an average value of currents of both

STPM01 数据表(PDF) 22 Page - STMicroelectronics

STPM01 数据表(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表下载