STPM01 datasheet(40/56 Pages) STMICROELECTRONICS

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Theory of operation

STPM01

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1 bit DATA value+6-bits address+1 bit (0 or 1) as depicted in figure 11. In this case the

binary command will be 0101111 (0x5F) which is the one depicted in the figure or 0101110

(0x5E).

t1 →t2 (>30ns): SPI out of idle state

t2 →t3 (>30ns): SPI enabled for write operation

t3: data value is placed in SDA

t4: SDA value is stable and shifted into the device

t3 →t5 (>10µs): writing Clock period

t3 →t5: 1 bit Data value

t5 →t6: 6 bits address of the destination latch

t6 →t7: 1 bit EXE command

t8: end of SPI writing

t9: SPI enters idle state

The same procedure should be applied for the mode signals, but in this case the 6-bits

address must be taken from the table 18.

The lsb of command is also called EXE bit because instead of data bit value, the

corresponding serial clock pulse is used to generate the necessary latching signal. This way

the writing mechanism does not need the measurement clock in order to operate, which

makes the operation of SPI module of STPM01 completely independent from the rest of

device logic except from the signal POR.

Commands for changing system signals should be sent during active signals SCS and SYN

as it is shown in the Figure 11. The SYN must be put low in order to disable SDATD output

driver of STPM01 and make the SDATD as an input pin. A string of commands can be send

within one period of active signals SCS and SYN or command can be followed by reading

the data record but, in this case, the SYN should be deactivated in order to enable SDATD

output driver and a SYN pulse should be applied before activation of SCS in order to latch

the data.

Interfacing the standard 3-wire SPI with STPM01 SPI.

Due to the fact a 2-wire SPI is implemented in STPM01 it is clear that sending any

command from a standard 3-wire SPI would require 3-wire to 2-wire interface, which should

produce a proper signal on SDATD from host signals SDI, SDO and SYN. A single gate 3-

Figure 26.

Timing for writing configuration and mode bits

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