TNETE2101

10BASE-T/100BASE-TX/100BASE-FX

LOW-POWER PHYSICAL-LAYER INTERFACE

SPWS032D – JANUARY 1997 – REVISED MARCH 1999

30

POST OFFICE BOX 655303

Airflow = 150 ft/min57.45

°C/W

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. All voltage values are with respect to GND.

2. Turning power supplies on and off (cycling sequence) within a mixed 5-V/3.3-V system is an important consideration. The designer

must observe a few rules to avoid damaging the TNETE2101. Check with the manufacturers of all components used in the 3.3-V

to 5-V interface to ensure that no unique device characteristics exist that would lead to rules more restrictive than the TNETE2101

requires.

• The optimum solution to power-supply sequencing in a mixed-voltage system is to ramp up the 3.3-V supply first. A power-on

reset component operating from this supply forces all 5-V-tolerant outputs into the high-impedance state. Then, the 5-V supply

is ramped up. On power down, the 5-V rail deenergizes first, followed by the 3.3-V rail.

• The second-best solution is to ramp both the 3.3-V and the 5-V rails at the same time, making sure that no more than 3.6 V exists

between these two rails during the ramp up or down. If the 3.3 V is derived from the 5 V, then the 3.3 V rises as the 5 V rises,

so the 5-V rail never exceeds the 3.3-V rail by more than 3.6 V. Both the optimum and second-best algorithms for power up prevent

device damage. If it is impractical to implement ramping, follow these rules:

–

When turning on the power supply, all 3.3-V and 5-V supplies should start ramping from 0 V and reach 95 percent of their

end-point values within 25 ms. All bus contention between the device and external devices is eliminated by the end of 25 ms.

–

When turning off the power supply, 3.3-V and 5-V supplies should start ramping from steady-state values and reach 5 percent

of their final values within 25 ms. All bus contention between devices and external devices is eliminated by the end of 25 ms.

There is a 250-s lifetime maximum at greater than 3.6-V difference between the supply rails. Holding the ramp-up/ramp-down

period to 25 ms per power-on/off cycle should not significantly contribute to mean-time-between-failure (MTBF) shifts during

product lifetimes.