TNETE2101

10BASE-T/100BASE-TX/100BASE-FX

LOW-POWER PHYSICAL-LAYER INTERFACE

SPWS032D – JANUARY 1997 – REVISED MARCH 1999

23

POST OFFICE BOX 655303

autonegotiation link partner ability register – an_lpa at 0x05

The link partner ability register, AN_lpa, has three different formats, depending on when the page is received.

The first page received from the link partner always is in the base-page encoding and is used by the PHY for

autoconfiguration. If the link partner supports next-page exchange, subsequently received pages can be in

either message-page or unformatted-page encoding, as determined by the value of the LPNP bit (in AN_lpa).

The use of next pages is summarized as:

of next pages.

the LPNP bit (in AN_lpa) and the NP bit (in AN_adv)]. A message page with a null-message code field value

is sent if the device has no other information to transmit.

page(s) should be interpreted.

referencing message code in the order specified by the message code.

pages.

base-page encoding

BIT

15

14

13

12

11

10

987654321

BIT

0

LPNP

ACK

LPRF

Link Partner Technology Ability Field

Link Partner Selector Field

Figure 12. Autonegotiation Link Partner Ability Register

Table 9. Autonegotiation Link Partner Ability Register Bit Functions

BIT

FUNCTION

NAME

NO.

FUNCTION

LPNP

15

Link partner next page. When LPNP is set to 1, the link partner is indicating that it wishes to exchange a next

page. See the description of NP in register AN_adv for more information on next-page exchange.

ACK

14

Acknowledge. Reserved for internal use of the autonegotiation process. Write as 0, ignore during read.

LPRF

13

Link partner remote fault. When LPRF is set to 1, the link partner is reporting a remote fault condition.

12, 11

Link partner technology ability field. Bits 12–5 are updated during autonegotiate with the 8-bit values received

from the link partner’s PHY advertisement register. Bits 9–5 are examined to determine the highest

common-link capability between the two PHYs.

Bit values for 12–11 are updated but to do so affects the PHY’s mode of operation.

Link Partner

Technology

Ability

10

Pause operation for full duplex links. Defined for use at the MAC level and when set to a 1 after autonegotiation,

signifies that the link partner’s MAC is capable of performing the pause function. The pause capability is

exchanged between the PHYs during the autonegotiation but does not change the PHY’s mode of operation.

The pause function is only valid during full-duplex operation, regardless of the medium.

Field

9

100BASE-T4. Set to a 1 if link partner supports 100BASE-T4. The TNETE2101 does not support this capability.

8

100BASE-TX full duplex. Set to 1 if supported by the link partner.

7

100BASE-TX half duplex. Set to 1 if supported by the link partner.

6

10BASE-T full duplex. Set to 1 if supported by the link partner.

5

10BASE-T half duplex. Set to 1 if supported by the link partner.

Link Partner

Selector Field

4–0

Link partner selector field. This 5-bit value encodes the format of this register. The PHY supports only IEEE

Std 802.3 format fields (see description of bits 12–5), code 00001. (The only other currently specified IEEE

value is 00010 for IEEE Std 802.9a multimedia frames).