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ADC3908CSSS 数据表(PDF) 32 Page - Texas Instruments |
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ADC3908CSSS 数据表(HTML) 32 Page - Texas Instruments |
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32 / 47 page ![]() When designing the amplifier/filter driving circuit, the ADC input full-scale voltage needs to be taken into consideration. For example, the ADC3908D125 input full-scale is 1.9 VPP. When factoring in approximately 1dB for insertion loss of the filter, then the amplifier needs to deliver close to 2.1 VPP. The amplifier distortion performance degrades with a larger output swing and considering the ADC common mode input voltage the amplifier may not be able to deliver the full swing. The deviceADC3908D125 provides an output common mode voltage of 1.25V and the THS4541 for example can only swing within 250mV of its negative supply. A unipolar 3.3V amplifier power supply limits the maximum voltage swing to approximately 2.8VPP. Hence, if a larger output swing is required (factoring in filter insertion loss) then a negative supply for the amplifier is needed to eliminate that limitation. Additionally, input voltage protection diodes may be needed to protect the ADC from over-voltage events. Table 8-2. Output voltage swing of THS4541 vs power supply DEVICE MIN OUTPUT VOLTAGE MAX SWING WITH 3.3V/ 0V SUPPLY THS4541 VS- + 250mV 2.8VPP 8.1.2 Detailed Design Procedure 8.1.2.1 Input Signal Path The THS4541 provides a good low power option to drive the ADC inputs. Table 8-3 provides an overview of the THS4541 with power consumption and usable frequency. Table 8-3. Fully Differential Amplifier Options DEVICE CURRENT (IQ) PER CHANNEL USABLE FREQUENCY RANGE THS4541 10mA < 70MHz The low pass filter design (topology, filter order) is driven by the application. However, when designing the low pass filter, the optimum load impedance for the amplifier must also be taken into consideration. 8.1.2.2 Sampling Clock Applications operating with low input frequencies (such as DC to 20MHz) typically are less sensitive to performance degradation due to clock jitter. The internal ADC aperture jitter improves with faster rise and fall times (that is, square wave vs sine wave). Termination of the clock input needs to be considered for long clock traces. ADC3908D025, ADC3908D065, ADC3908D125 ADC3908S025, ADC3908S065, ADC3908S125 SBASAU9 – OCTOBER 2024 www.ti.com 32 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: ADC3908D025 ADC3908D065 ADC3908D125 ADC3908S025 ADC3908S065 ADC3908S125 |
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