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ADC3908CSSS 数据表(PDF) 37 Page - Texas Instruments |
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ADC3908CSSS 数据表(HTML) 37 Page - Texas Instruments |
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37 / 47 page ![]() Clock routing without vias Analog inputs routed on top layer with no vias CMOS output lines with isolation resistors Bypass caps close to VREF pin Figure 8-7. Layout Example: top layer of ADC3910D125EVM www.ti.com ADC3908D025, ADC3908D065, ADC3908D125 ADC3908S025, ADC3908S065, ADC3908S125 SBASAU9 – OCTOBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: ADC3908D025 ADC3908D065 ADC3908D125 ADC3908S025 ADC3908S065 ADC3908S125 |
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