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M69KB128AA 数据表(PDF) 31 Page - STMicroelectronics

部件名 M69KB128AA
功能描述  128 Mbit (8Mb x16) 1.8V Supply, Burst PSRAM
PDF  68 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M69KB128AA 数据表(HTML) 31 Page - STMicroelectronics

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M69KB128AA
7 Configuration registers
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7.3.6
Driver Strength Bits (BCR5-BCR4)
The Driver Strength bits allow to set the output drive strength to adjust to different data bus
loading. Normal driver strength (full drive) and reduced driver strength (half drive and a quarter
drive) are available.
By default, outputs are configured at ‘half drive” strength.
7.3.7
Burst Wrap Bit (BCR3)
Burst Read operations can be confined inside the 4, 8, 16 or 32 Word boundary (wrap) or
allowed to step across the boundary (no wrap). The Burst Wrap bit is used to select between
‘wrap’ and ‘no wrap’. If the Burst Wrap bit is set to ‘1’ (no wrap), the device outputs data
sequentially regardless of burst boundaries. When Continuous Burst operation is selected, the
internal address switches to 000000h if the read address passes the last address. By default,
Burst wrap is disabled (see also Table 10: Burst Type Definition).
7.3.8
Burst Length Bits (BCR2-BCR0)
The Burst Length bits set the number of Words to be output or input during a Synchronous
Burst Read or Write operation. They can be set for 4 Words, 8 Words, 16 Words, 32 Words or
Continuous Burst (default settings), where all the Words are output or input sequentially
regardless of address boundaries (see also Table 10: Burst Type Definition).



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