数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

STM32F103C8 数据表(PDF) 47 Page - STMicroelectronics

部件名 STM32F103C8
功能描述  Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces
PDF  67 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F103C8 数据表(HTML) 47 Page - STMicroelectronics

Back Button STM32F103C8 Datasheet HTML 43Page - STMicroelectronics STM32F103C8 Datasheet HTML 44Page - STMicroelectronics STM32F103C8 Datasheet HTML 45Page - STMicroelectronics STM32F103C8 Datasheet HTML 46Page - STMicroelectronics STM32F103C8 Datasheet HTML 47Page - STMicroelectronics STM32F103C8 Datasheet HTML 48Page - STMicroelectronics STM32F103C8 Datasheet HTML 49Page - STMicroelectronics STM32F103C8 Datasheet HTML 50Page - STMicroelectronics STM32F103C8 Datasheet HTML 51Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 47 / 67 page
background image
STM32F103xx
Electrical characteristics
47/67
Figure 16.
I/O AC characteristics definition
5.3.13
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 29).
Unless otherwise specified, the parameters given in Table 32 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 7.
ai14131
10%
90%
50%
tr(IO)out
OUTPUT
EXT ERNAL
ON 50pF
Maximum fr equency is achieved if (tr + tf) £ 2/3)T and if the duty cycle is (45-55%)
10%
50%
90%
when loaded by 50pF
T
tr(IO)out
Table 32.
NRST pin characteristics(1)
1.
TBD stands for to be determined.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST)
NRST Input low level voltage
–0.5
0.8
V
VIH(NRST)
NRST Input high level voltage
2
VDD+0.5
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
200
RPU
Weak pull-up equivalent resistor(2)
2.
The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
to the series resistance must be minimum
(~10% order)
.
VIN = VSS
30
40
50
k
Ω
VF(NRST)
NRST Input filtered pulse(3)
3.
Values guaranteed by design, not tested in production.
100
ns
VNF(NRST) NRST Input not filtered pulse
(3)
300
µs



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com