DSP56321 datasheet(2/84 Pages) FREESCALE

2 / 84 page

DSP56321 Technical Data, Rev. 11

Freescale Semiconductor

Table of Contents

Data Sheet Conventions .......................................................................................................................................ii

Features ...............................................................................................................................................................iii

Target Applications ............................................................................................................................................. iv

Product Documentation .......................................................................................................................................v

Chapter 1

Signals/Connections

1.1

Power ................................................................................................................................................................1-3

1.2

Ground ..............................................................................................................................................................1-3

1.3

Clock .................................................................................................................................................................1-3

1.4

External Memory Expansion Port (Port A) ......................................................................................................1-4

1.5

Interrupt and Mode Control ..............................................................................................................................1-6

1.6

Host Interface (HI08) ........................................................................................................................................1-7

1.7

Enhanced Synchronous Serial Interface 0 (ESSI0) ........................................................................................1-10

1.8

Enhanced Synchronous Serial Interface 1 (ESSI1) ........................................................................................1-11

1.9

Serial Communication Interface (SCI) ...........................................................................................................1-12

1.10

Timers .............................................................................................................................................................1-13

1.11

JTAG and OnCE Interface ..............................................................................................................................1-14

Chapter 2

Specifications

2.1

Maximum Ratings.............................................................................................................................................2-1

2.2

Thermal Characteristics ....................................................................................................................................2-2

2.3

DC Electrical Characteristics............................................................................................................................2-2

2.4

AC Electrical Characteristics ............................................................................................................................2-3

Chapter 3

Packaging

3.1

Package Description .........................................................................................................................................3-2

3.2

MAP-BGA Package Mechanical Drawing .....................................................................................................3-10

Chapter 4

Design Considerations

4.1

Thermal Design Considerations........................................................................................................................4-1

4.2

Electrical Design Considerations......................................................................................................................4-2

4.3

Power Consumption Considerations.................................................................................................................4-3

4.4

Input (EXTAL) Jitter Requirements .................................................................................................................4-4

Appendix A

Power Consumption Benchmark

Data Sheet Conventions

OVERBAR

Indicates a signal that is active when pulled low (For example, the RESET pin is active when

low.)

“asserted”

Means that a high true (active high) signal is high or that a low true (active low) signal is low

“deasserted”

Means that a high true (active high) signal is low or that a low true (active low) signal is high

Examples:

Signal/Symbol

Logic State

Signal State

Voltage

True

Asserted

VIL/VOL

False

Deasserted

VIH/VOH

True

Asserted

VIH/VOH

False

Deasserted

VIL/VOL

Note:

Values for VIL, VOL, VIH, and VOH are defined by individual product specifications.

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