AD4058BCPZ-R2 datasheet(41/66 Pages) AD

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Data Sheet

AD4052/AD4058

SERIAL INTERFACE

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Rev. B | 41 of 66

ADC MODE OUTPUT DATA FORMAT

This section describes the SPI output data format for the ADC

modes described in the Modes of Operation section (sample mode,

averaging mode, burst averaging mode, and trigger mode). The

output word consists of the ADC results (ADC_DATA) and optional

sign extension (SE_BYTE) and CRC bytes (CRC). The output word

length is always an integer multiple of bytes to ensure compatibility

with digital host serial interface and data packet transfers (such as

DMA), which are often segmented into integer multiples of bytes.

Figure 67 shows all supported formats for sample and trigger

modes, and Figure 68 shows all supported formats for averaging

and burst averaging modes.

In sample and trigger modes, the ADC_DATA are 16 bits long (2

bytes). In averaging and burst averaging mode, the ADC_DATA are

20 bits long with 4 bits of sign extension (SE_BITS) for a total of

24 bits (3 bytes). The ADC_DATA are either twos complement or

straight binary depending on the DATA_FORMAT bit setting (see

the Transfer Function section).

Sign-Extension Byte

The optional SE_BYTE allows the AD4052/AD4058 output word

length to match the digital host data transfer size, if needed. When

enabled, a byte of MSB sign-extension is added to the ADC data.

For example, the default ADC output word length in burst averaging

mode is 3 bytes. However, the SE_BYTE can convert the output

word to 4 bytes for direct compatibility with a 4-byte DMA transfer.

The ADC_DATA are right-justified to maintain the integer values

without bit-shifting in software.

The SE_BYTE is enabled by setting the SIGN_EXT_EN bit to 1.

The SE_BYTE is disabled by default.

ADC CRC

When the CRC is enabled, an 8-bit checksum code is appended to

the ADC result on the SDO pin. The CRC checksum is calculated

using the same polynomial given in Equation 6 with the SDO data

as the input and a seed value of 0xA5 for all reads. The CRC is

enabled with the CRC_EN and CRC_EN_B bit fields, as described

in the Register Access CRC section. The CRC is disabled by

default.

ADC_DATA (16-BITS)

SE_BYTE (8-BITS)

ADC_DATA (16-BITS)

CRC (8-BITS)

SE_BYTE (8-BITS)

ADC_DATA (16-BITS)

CRC (8-BITS)

MSB

LSB

BYTE 1

BYTE 2

BYTE 3

BYTE 4

DEFAULT

SE_BYTE

ONLY

CRC

ONLY

SE_BYTE

AND CRC

Figure 67. SPI Data Formats for Sample Mode and Trigger Mode

MSB

LSB

BYTE 1

BYTE 2

BYTE 3

BYTE 4

BYTE 5

SE_BITS (4-BITS)

ADC_DATA (20-BITS)

SE_BYTE (8-BITS)

SE_BITS (4-BITS)

ADC_DATA (20-BITS)

SE_BITS (4-BITS)

ADC_DATA (20-BITS)

CRC (8-BITS)

SE_BYTE (8-BITS)

SE_BITS (4-BITS)

ADC_DATA (20-BITS)

CRC (8-BITS)

DEFAULT

SE_BYTE

ONLY

CRC

ONLY

SE_BYTE

AND CRC

Figure 68. SPI Data Formats for Averaging Mode and Burst Averaging Mode

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