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AD4058BCPZ-R2 数据表(PDF) 53 Page - Analog Devices

部件名 AD4058BCPZ-R2
功能描述  Compact, Low Power, 16-Bit, 2 MSPS/500 kSPS Easy Drive SAR ADC
PDF  66 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD4058BCPZ-R2 数据表(HTML) 53 Page - Analog Devices

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Data Sheet
AD4052/AD4058
REGISTER DETAILS
analog.com
Rev. B | 53 of 66
INTERFACE CONFIGURATION A REGISTER
Address: 0x00, Reset: 0x10, Name: INTERFACE_CONFIG_A
Interface Configuration Settings
Table 23. Bit Descriptions for INTERFACE_CONFIG_A
Bits
Bit Name
Description
Reset
Access
7
SW_RESET_MSB
Software Reset Bit (MSB). Set both SW_RESET_MSB and SW_RESET_LSB to 1 in the same register write
to initiate a software reset of the device.
0x0
R/W
6
RESERVED
Reserved.
0x0
R
5
ADDR_DIR
Reserved. This bit must be set to 0. The ADDR_DIR bit is not reset by software resets, and it must be reset
by the software reset pattern or power-on reset.
0x0
R/W
[4:1]
RESERVED
Reserved.
0x8
R
0
SW_RESET_LSB
Software Reset Bit (LSB). Set both SW_RESET_MSB and SW_RESET_LSB to 1 in the same register write
to initiate a software reset of the device.
0x0
R/W
INTERFACE CONFIGURATION B REGISTER
Address: 0x01, Reset: 0x08, Name: INTERFACE_CONFIG_B
Table 24. Bit Descriptions for INTERFACE_CONFIG_B
Bits
Bit Name
Description
Reset
Access
7
SINGLE_INST
Reserved. This bit must be set to 0.
0x0
R/W
[6:4]
RESERVED
Reserved.
0x0
R
3
ADDR_LEN
Address Length Bit. Sets the length of the register address in the instruction phase to 7 or 15 bits.
0x1
R/W
0: 15-Bit Addressing.
1: 7-Bit Addressing.
[2:0]
RESERVED
Reserved.
0x0
R
DEVICE CONFIGURATION REGISTER
Address: 0x02, Reset: 0xF0, Name: DEVICE_CONFIG
Table 25. Bit Descriptions for DEVICE_CONFIG
Bits
Bit Name
Description
Reset
Access
[7:2]
RESERVED
Reserved.
0x3C
R
[1:0]
POWER_MODE
Power Modes.
0x0
R/W



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