AD4058BCPZ-R2 datasheet(59/66 Pages) AD

59 / 66 page

Data Sheet

AD4052/AD4058

analog.com

Rev. B | 59 of 66

Table 40. Bit Descriptions for AVG_CONFIG

Bits

Bit Name

Description

Reset

Access

[7:4]

RESERVED

Reserved.

0x0

[3:0]

AVG_WIN_LEN

Averaging Filter Window Length. Sets the averaging ratio for averaging and burst averaging modes. The

averaging ratio ranges from 2 to 4096 in powers of 2.

0x0

R/W

0x0: 2.

0x1: 4.

0x2: 8.

0x3: 16.

0x4: 32.

0x5: 64.

0x6: 128.

0x7: 256.

0x8: 512.

0x9: 1024.

0xA: 2048.

0xB: 4096.

GENERAL PURPOSE PIN CONFIGURATION REGISTER

Address: 0x24, Reset: 0xF0, Name: GP_CONFIG

Table 41. Bit Descriptions for GP_CONFIG

Bits

Bit Name

Description

Reset

Access

DEV_EN_POL

DEV_EN Signal Polarity. Sets the polarity of the DEV_EN signal for compatibility with active high and

active low amplifier enable pins.

0x1

R/W

0: DEV_EN Active Low.

1: DEV_EN Active High (Default).

[6:4]

GP1_MODE

GP1 Pin Function Selection.

0x7

R/W

0x0: Disabled/High-Z.

0x1: GP1_INTR Signal.

0x2: Data Ready Signal.

0x3: DEV_EN Signal.

0x4: CHOP Signal.

0x5: Static Logic Low (GND).

0x6: Static Logic High (VIO).

0x7: DEV_RDY Signal (Default).

INVERT_ON_CHOP

Invert on Chop Enable or Disable control.

0x0

R/W

0: Invert on Chop Disabled

1: Invert on Chop Enabled

[2:0]

GP0_MODE

GP0 Pin Function Selection.

0x0

R/W

0x0: Disabled/High-Z (Default).

0x1: GP0_INTR Signal.

0x2: Data Ready Signal.

0x3: DEV_EN Signal.

0x4: CHOP Signal.

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