WM8994ECSSLASHR datasheet(241/363 Pages) CIRRUS

241 / 363 page

WM8994

Rev 4.6

241

THERMAL SHUTDOWN

The WM8994 incorporates a temperature sensor which detects when the device temperature is within

normal limits or if the device is approaching a hazardous temperature condition. The temperature

sensor can be configured to automatically disable the audio outputs of the WM8994 in response to an

overtemperature condition (approximately 150ºC).

The temperature status can be output directly on a GPIO pin,

as described in the “General Purpose

Input/Output

” section. The temperature sensor can also be used to generate Interrupt events, as

described in the “Interrupts” section. The GPIO and Interrupt functions can be used to indicate either a

Warning Temperature event or the Shutdown Temperature event.

The temperature sensor is enabled by setting the TSHUT_ENA register bit. When the TSHUT_OPDIS

is also set, then a device over-temperature condition will cause the speaker outputs (SPKOUTL and

SPKOUTR) of the WM8994 to be disabled; this response is likely to prevent any damage to the device

attributable to the large currents of the output drivers.

Note that, to prevent pops and clicks, TSHUT_ENA and TSHUT_OPDIS should only be updated

whilst the speaker and headphone outputs are disabled.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R2 (0002h)

Power

Management

(2)

TSHUT_ENA

Thermal sensor enable

0 = Disabled

1 = Enabled

TSHUT_OPDIS

Thermal shutdown control

(Causes audio outputs to be disabled

if an overtemperature occurs. The

thermal sensor must also be enabled.)

0 = Disabled

1 = Enabled

Table 139 Thermal Shutdown

POWER ON RESET

The WM8994 includes a Power-On Reset (POR) circuit, which is used to reset the digital logic into a

default state after power up. The POR circuit derives its output from AVDD2 and DCVDD. The internal

POR

¯¯¯ signal is asserted low when AVDD2 and DCVDD are below minimum thresholds.

The specific behaviour of the circuit will vary, depending on relative timing of the supply voltages.

Typical scenarios are illustrated in Figure 85 and Figure 86.

DCVDD

Vpord_on

AVDD2

Vpora

Vpora_off

Internal POR

Device ready

POR active

POR undefined

Vpora_on

Figure 85 Power On Reset Timing

– AVDD2 enabled/disabled first

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