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WM8994ECS/R 数据表(PDF) 243 Page - Cirrus Logic

部件名 WM8994ECS/R
功能描述  Multi-channel Audio Hub CODEC for Smartphones
PDF  363 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8994ECS/R 数据表(HTML) 243 Page - Cirrus Logic

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WM8994
Rev 4.6
243
Table 141 describes the status of the WM8994 digital I/O pins when the Power On Reset has
completed, prior to any register writes. The same conditions apply on completion of a Software Reset
(described in the “Software Reset and Device ID” section).
PIN NO
NAME
TYPE
RESET STATUS
DBVDD power domain
A3
SPKMODE
Digital Input
Pull-up to DBVDD
A4
CIFMODE
Digital Input
Pull-down to DGND
D4
LDO1ENA
Digital Input
Pull-down to DGND
D5
LDO2ENA
Digital Input
Pull-down to DGND
G2
CS/ADDR
Digital Input
Pull-down to DGND
H1
SCLK
Digital Input
Digital input
F3
SDA
Digital Input/Output
Digital input
D3
MCLK1
Digital Input
Digital input
E1
GPIO2/MCLK2
Digital Input
Pull-down to DGND
G1
BCLK1
Digital Input/Output
Digital input
E3
LRCLK1
Digital Input/Output
Digital input
G3
ADCLRCLK1/GPIO1
Digital Input/Output
Digital input
E4
DACDAT1
Digital Input
Digital input
F2
ADCDAT1
Digital Output
Digital output
H2
GPIO3/BCLK2
Digital Input/Output
Digital input,
Pull-down to DGND
F4
GPIO4/LRCLK2
Digital Input/Output
Digital input,
Pull-down to DGND
H3
GPIO5/DACDAT2
Digital Input/Output
Digital input,
Pull-down to DGND
G4
GPIO6/ADCLRCLK2
Digital Input/Output
Digital input,
Pull-down to DGND
E5
GPIO7/ADCDAT2
Digital Input/Output
Digital input,
Pull-down to DGND
H4
GPIO8/DACDAT3
Digital Input/Output
Digital input,
Pull-down to DGND
F5
GPIO9/ADCDAT3
Digital Input/Output
Digital input,
Pull-down to DGND
H5
GPIO10/LRCLK3
Digital Input/Output
Digital input,
Pull-down to DGND
F6
GPIO11/BCLK3
Digital Input/Output
Digital input,
Pull-down to DGND
MICBIAS1 power domain
C6
DMICCLK
Digital Output
Digital output
B9
IN2LN/DMICDAT1
Analogue Input/Digital Input
Analogue input
A9
IN2RN/DMICDAT2
Analogue Input/Digital Input
Analogue input
Table 141 WM8994 Digital I/O Status in Reset
Note that the dual function IN2LN/DMICDAT1 and IN2RN/DMICDAT2 pins default to IN2LN or IN2RN
(analogue input) after Power On Reset is completed. The IN2LN and IN2RN functions are referenced
to the AVDD1 power domain.



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