数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADS7253 数据表(PDF) 42 Page - Texas Instruments

部件名 ADS7253
功能描述  ADSxx54 Dual, High-Speed, 16-, 14-, and 12-Bit, Simultaneous-Sampling, Analog-to-Digital Converters
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

ADS7253 数据表(HTML) 42 Page - Texas Instruments

Back Button ADS7253 Datasheet HTML 38Page - Texas Instruments ADS7253 Datasheet HTML 39Page - Texas Instruments ADS7253 Datasheet HTML 40Page - Texas Instruments ADS7253 Datasheet HTML 41Page - Texas Instruments ADS7253 Datasheet HTML 42Page - Texas Instruments ADS7253 Datasheet HTML 43Page - Texas Instruments ADS7253 Datasheet HTML 44Page - Texas Instruments ADS7253 Datasheet HTML 45Page - Texas Instruments ADS7253 Datasheet HTML 46Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 42 / 73 page
background image
1
2
3
4
5
14
15
16
17
18
19
20
21
30
31
32
SCLK
CS
0
0
D13-
A
D12-
A
D11-
A
D2-A
D1-A
D0-A
0
0
D13-
B
D12-
B
ADS7853, ADS7854
SDO_A
Sample
N
Sample
N+1
tTHROUGHPUT
D11-
B
D2-B
D1-B
D0-B
tPH_CS
Data From Sample N
B15
B14
B13
B12
B2
B1
B0
X
X
X
X
SDI
X
ADS7253, ADS7254
SDO_A
X
X
X
0
0
D11-
A
D10-
A
D9-A
D0-A
0
0
0
0
D11-
B
D10-
B
D9-B D0-B
0
0
13
D3-A
D1-A
B3
tCONV
tACQ
tCONV
tACQ
tSCLK
All Devices
SDO_B
ADS8354, ADS7854, ADS7254
SBAS556B – OCTOBER 2013 – REVISED AUGUST 2014
www.ti.com
8.5.3.2.4
16-CLK, Single-SDO Mode (CFR.B11 = 1, CFR.B10 = 1)
The 16-CLK, single-SDO mode provides the option of using only one SDO pin (SDO_A) and a lower-speed clock
to read the conversion results of both ADCs. This interface mode is not supported by the ADS8354.
For the ADS7854 and ADS7254, this mode can be selected by writing CFR.B11 = 1 and CFR.B10 = 1. The
SDO_A pin is used to output the conversion results of both ADCs (ADC_A and ADC_B). SDO_B remains in 3-
state and can be treated as a no connect (NC) pin. Figure 93 shows a detailed timing diagram for this mode.
Figure 93. 16-CLK, Single-SDO Mode Timing Diagram
A CS falling edge brings the serial data bus out of 3-state and also outputs a 0 on the SDO_A pin. The
subsequent SCLK falling edges are used for conversion and for data transfer using the serial interface, as shown
in Table 17.
The sample-and-hold circuit goes back into sample mode as soon as the conversion process is over.
Table 17. Data Launch Edge
LAUNCH EDGE
DEVICE
PIN
CS
SCLK
CS
↓
↓1
↓2
—
↓13
↓14
↓15
↓16
↓17
↓18
—
↓29
↓30
↓31
↓32 ...
↑
ADS7854
SDO-A
0
0
D13_A
—
D2_A
D1_A
D0_A
0
0
D13_B
—
D2_B
D1_B
D0_B
0 ...
Hi-Z
ADS7254
SDO-A
0
0
D11_A
—
D0_A
0
0
0
0
D11_B
—
D0_B
0
0
0 ...
Hi-Z
42
Submit Documentation Feedback
Copyright © 2013–2014, Texas Instruments Incorporated
Product Folder Links: ADS8354 ADS7854 ADS7254



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com